llvm-6502/test/CodeGen/X86/pr12360.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

47 lines
852 B
LLVM

; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define zeroext i1 @f1(i8* %x) {
; CHECK-LABEL: f1:
; CHECK: movb (%rdi), %al
; CHECK-NEXT: ret
entry:
%0 = load i8, i8* %x, align 1, !range !0
%tobool = trunc i8 %0 to i1
ret i1 %tobool
}
define zeroext i1 @f2(i8* %x) {
; CHECK-LABEL: f2:
; CHECK: movb (%rdi), %al
; CHECK-NEXT: ret
entry:
%0 = load i8, i8* %x, align 1, !range !0
%tobool = icmp ne i8 %0, 0
ret i1 %tobool
}
!0 = !{i8 0, i8 2}
; check that we don't build a "trunc" from i1 to i1, which would assert.
define zeroext i1 @f3(i1 %x) {
; CHECK-LABEL: f3:
entry:
%tobool = icmp ne i1 %x, 0
ret i1 %tobool
}
; check that we don't build a trunc when other bits are needed
define zeroext i1 @f4(i32 %x) {
; CHECK-LABEL: f4:
; CHECK: and
entry:
%y = and i32 %x, 32768
%z = icmp ne i32 %y, 0
ret i1 %z
}