Saleem Abdulrasool 90d0ed297f ARM: honour -f{no-,}optimize-sibling-calls ... Use the options in the ARMISelLowering to control whether tail calls are optimised or not. Previously, this option was entirely ignored on the ARM target and only honoured on x86. This option is mostly useful in profiling scenarios. The default remains that tail call optimisations will be applied. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203577 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-11 15:09:54 +00:00
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AArch64	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
ARM	ARM: honour -f{no-,}optimize-sibling-calls	2014-03-11 15:09:54 +00:00
CPP
Generic
Hexagon
Inputs
Mips	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
MSP430
NVPTX
PowerPC	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
R600
SPARC	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
SystemZ	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
Thumb
Thumb2
X86	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
XCore