mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-02 11:30:10 +00:00
f4632b58c7
It's much easier to specify the encoding with tablegen directly. Signed-off-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176344 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.1 KiB
C++
41 lines
1.1 KiB
C++
//===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
/// \file
|
|
/// \brief CodeEmitter interface for R600 and SI codegen.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef AMDGPUCODEEMITTER_H
|
|
#define AMDGPUCODEEMITTER_H
|
|
|
|
#include "llvm/MC/MCCodeEmitter.h"
|
|
#include "llvm/Support/raw_ostream.h"
|
|
|
|
namespace llvm {
|
|
|
|
class MCInst;
|
|
class MCOperand;
|
|
|
|
class AMDGPUMCCodeEmitter : public MCCodeEmitter {
|
|
public:
|
|
|
|
uint64_t getBinaryCodeForInstr(const MCInst &MI,
|
|
SmallVectorImpl<MCFixup> &Fixups) const;
|
|
|
|
virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
|
SmallVectorImpl<MCFixup> &Fixups) const {
|
|
return 0;
|
|
}
|
|
};
|
|
|
|
} // End namespace llvm
|
|
|
|
#endif // AMDGPUCODEEMITTER_H
|