Tom Stellard 26bfda9dd3 R600/SI: Enable subreg liveness by default ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228228 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-04 23:14:18 +00:00
..
AArch64	MachineCSE: Clear dead-def flag on CSE.	2015-02-04 19:35:16 +00:00
ARM	Adding support to LLVM for targeting Cortex-A72	2015-02-04 13:31:29 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.	2015-02-04 17:52:06 +00:00
Inputs
Mips	[mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructions	2015-02-04 15:43:17 +00:00
MSP430
NVPTX	[NVPTX] Emit .pragma "nounroll" for loops marked with nounroll	2015-02-01 02:27:45 +00:00
PowerPC	Add missing test case from r228046	2015-02-04 20:00:04 +00:00
R600	R600/SI: Enable subreg liveness by default	2015-02-04 23:14:18 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	Don' try to make sections in comdats SHF_MERGE.	2015-02-04 21:27:24 +00:00
XCore