mirror of
https://github.com/c64scene-ar/llvm-6502.git
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1dad6937c5
This frequently leads to cases like: ldr xD, [xN, :lo12:var] add xA, xN, :lo12:var ldr xD, [xA, #8] where the ADD would have been needed anyway, and the two distinct addressing modes can prevent the formation of an ldp. Because of how we handle ADRP (aggressively forming an ADRP/ADD pseudo-inst at ISel time), this pattern also results in duplicated ADRP instructions (one on its own to cover the ldr, and one combined with the add). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223172 91177308-0d34-0410-b5e6-96231b3b80d8
162 lines
5.4 KiB
LLVM
162 lines
5.4 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-neon | FileCheck --check-prefix=CHECK-NONEON %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK-BE %s
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%myStruct = type { i64 , i8, i32 }
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@var8 = global i8 0
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@var8_2 = global i8 0
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@var32 = global i32 0
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@var64 = global i64 0
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@var128 = global i128 0
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@varfloat = global float 0.0
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@varfloat_2 = global float 0.0
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@vardouble = global double 0.0
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@varstruct = global %myStruct zeroinitializer
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@varsmallstruct = global [2 x i64] zeroinitializer
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declare void @take_i8s(i8 %val1, i8 %val2)
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declare void @take_floats(float %val1, float %val2)
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define void @simple_args() {
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; CHECK-LABEL: simple_args:
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%char1 = load i8* @var8
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%char2 = load i8* @var8_2
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call void @take_i8s(i8 %char1, i8 %char2)
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; CHECK-DAG: ldrb w0, [{{x[0-9]+}}, {{#?}}:lo12:var8]
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; CHECK-DAG: ldrb w1, [{{x[0-9]+}}, {{#?}}:lo12:var8_2]
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; CHECK: bl take_i8s
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%float1 = load float* @varfloat
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%float2 = load float* @varfloat_2
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call void @take_floats(float %float1, float %float2)
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; CHECK-DAG: ldr s1, [{{x[0-9]+}}, {{#?}}:lo12:varfloat_2]
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; CHECK-DAG: ldr s0, [{{x[0-9]+}}, {{#?}}:lo12:varfloat]
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; CHECK: bl take_floats
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; CHECK-NOFP-NOT: ldr s1,
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; CHECK-NOFP-NOT: ldr s0,
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ret void
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}
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declare i32 @return_int()
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declare double @return_double()
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declare [2 x i64] @return_smallstruct()
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declare void @return_large_struct(%myStruct* sret %retval)
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define void @simple_rets() {
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; CHECK-LABEL: simple_rets:
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%int = call i32 @return_int()
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store i32 %int, i32* @var32
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; CHECK: bl return_int
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; CHECK: str w0, [{{x[0-9]+}}, {{#?}}:lo12:var32]
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%dbl = call double @return_double()
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store double %dbl, double* @vardouble
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; CHECK: bl return_double
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; CHECK: str d0, [{{x[0-9]+}}, {{#?}}:lo12:vardouble]
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; CHECK-NOFP-NOT: str d0,
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%arr = call [2 x i64] @return_smallstruct()
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store [2 x i64] %arr, [2 x i64]* @varsmallstruct
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; CHECK: bl return_smallstruct
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; CHECK: add x[[VARSMALLSTRUCT:[0-9]+]], {{x[0-9]+}}, :lo12:varsmallstruct
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; CHECK: stp x0, x1, [x[[VARSMALLSTRUCT]]]
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call void @return_large_struct(%myStruct* sret @varstruct)
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; CHECK: add x8, {{x[0-9]+}}, {{#?}}:lo12:varstruct
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; CHECK: bl return_large_struct
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ret void
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}
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declare i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45,
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i32* %var6, %myStruct* byval %struct, i32 %stacked,
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double %notstacked)
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declare void @stacked_fpu(float %var0, double %var1, float %var2, float %var3,
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float %var4, float %var5, float %var6, float %var7,
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float %var8)
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define void @check_stack_args() {
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; CHECK-LABEL: check_stack_args:
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call i32 @struct_on_stack(i8 0, i16 12, i32 42, i64 99, i128 1,
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i32* @var32, %myStruct* byval @varstruct,
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i32 999, double 1.0)
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; Want to check that the final double is passed in registers and
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; that varstruct is passed on the stack. Rather dependent on how a
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; memcpy gets created, but the following works for now.
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; CHECK-DAG: str {{q[0-9]+}}, [sp]
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; CHECK-DAG: fmov d[[FINAL_DOUBLE:[0-9]+]], #1.0
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; CHECK: mov v0.16b, v[[FINAL_DOUBLE]].16b
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; CHECK-NONEON-DAG: str {{q[0-9]+}}, [sp]
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; CHECK-NONEON-DAG: fmov d[[FINAL_DOUBLE:[0-9]+]], #1.0
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; CHECK-NONEON: fmov d0, d[[FINAL_DOUBLE]]
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; CHECK: bl struct_on_stack
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; CHECK-NOFP-NOT: fmov
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call void @stacked_fpu(float -1.0, double 1.0, float 4.0, float 2.0,
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float -2.0, float -8.0, float 16.0, float 1.0,
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float 64.0)
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; CHECK: movz [[SIXTY_FOUR:w[0-9]+]], #0x4280, lsl #16
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; CHECK: str [[SIXTY_FOUR]], [sp]
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; CHECK-NONEON: movz [[SIXTY_FOUR:w[0-9]+]], #0x4280, lsl #16
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; CHECK-NONEON: str [[SIXTY_FOUR]], [sp]
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; CHECK: bl stacked_fpu
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ret void
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}
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declare void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
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i32 %val4, i32 %val5, i32 %val6, i32 %val7,
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i32 %stack1, i128 %stack2)
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declare void @check_i128_regalign(i32 %val0, i128 %val1)
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define void @check_i128_align() {
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; CHECK-LABEL: check_i128_align:
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%val = load i128* @var128
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call void @check_i128_stackalign(i32 0, i32 1, i32 2, i32 3,
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i32 4, i32 5, i32 6, i32 7,
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i32 42, i128 %val)
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; CHECK: add x[[VAR128:[0-9]+]], {{x[0-9]+}}, :lo12:var128
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; CHECK: ldp [[I128LO:x[0-9]+]], [[I128HI:x[0-9]+]], [x[[VAR128]]]
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; CHECK: stp [[I128LO]], [[I128HI]], [sp, #16]
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; CHECK-NONEON: add x[[VAR128:[0-9]+]], {{x[0-9]+}}, :lo12:var128
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; CHECK-NONEON: ldp [[I128LO:x[0-9]+]], [[I128HI:x[0-9]+]], [x[[VAR128]]]
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; CHECK-NONEON: stp [[I128LO]], [[I128HI]], [sp, #16]
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; CHECK: bl check_i128_stackalign
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call void @check_i128_regalign(i32 0, i128 42)
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; CHECK-NOT: mov x1
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; CHECK-LE: movz x2, #{{0x2a|42}}
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; CHECK-LE: mov x3, xzr
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; CHECK-BE: movz {{x|w}}3, #{{0x2a|42}}
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; CHECK-BE: mov x2, xzr
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; CHECK: bl check_i128_regalign
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ret void
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}
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@fptr = global void()* null
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define void @check_indirect_call() {
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; CHECK-LABEL: check_indirect_call:
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%func = load void()** @fptr
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call void %func()
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; CHECK: ldr [[FPTR:x[0-9]+]], [{{x[0-9]+}}, {{#?}}:lo12:fptr]
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; CHECK: blr [[FPTR]]
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ret void
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}
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