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9b9d45f60e
PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.5 KiB
C++
51 lines
1.5 KiB
C++
//===- IA64InstrInfo.h - IA64 Instruction Information ----------*- C++ -*- ===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Duraid Madina and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the IA64 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef IA64INSTRUCTIONINFO_H
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#define IA64INSTRUCTIONINFO_H
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#include "llvm/Target/TargetInstrInfo.h"
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#include "IA64RegisterInfo.h"
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namespace llvm {
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/// IA64II - This namespace holds all of the target specific flags that
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/// instruction info tracks.
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/// FIXME: now gone!
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class IA64InstrInfo : public TargetInstrInfo {
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const IA64RegisterInfo RI;
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public:
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IA64InstrInfo();
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
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//
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// Return true if the instruction is a register to register move and
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// leave the source and dest operands in the passed parameters.
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//
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virtual bool isMoveInstr(const MachineInstr& MI,
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unsigned& sourceReg,
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unsigned& destReg) const;
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};
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} // End llvm namespace
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#endif
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