mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27907 91177308-0d34-0410-b5e6-96231b3b80d8
193 lines
5.6 KiB
Plaintext
193 lines
5.6 KiB
Plaintext
Target Independent Opportunities:
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===-------------------------------------------------------------------------===
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FreeBench/mason contains code like this:
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static p_type m0u(p_type p) {
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int m[]={0, 8, 1, 2, 16, 5, 13, 7, 14, 9, 3, 4, 11, 12, 15, 10, 17, 6};
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p_type pu;
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pu.a = m[p.a];
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pu.b = m[p.b];
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pu.c = m[p.c];
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return pu;
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}
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We currently compile this into a memcpy from a static array into 'm', then
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a bunch of loads from m. It would be better to avoid the memcpy and just do
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loads from the static array.
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//===---------------------------------------------------------------------===//
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Make the PPC branch selector target independant
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//===---------------------------------------------------------------------===//
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Get the C front-end to expand hypot(x,y) -> llvm.sqrt(x*x+y*y) when errno and
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precision don't matter (ffastmath). Misc/mandel will like this. :)
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//===---------------------------------------------------------------------===//
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Solve this DAG isel folding deficiency:
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int X, Y;
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void fn1(void)
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{
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X = X | (Y << 3);
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}
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compiles to
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fn1:
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movl Y, %eax
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shll $3, %eax
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orl X, %eax
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movl %eax, X
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ret
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The problem is the store's chain operand is not the load X but rather
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a TokenFactor of the load X and load Y, which prevents the folding.
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There are two ways to fix this:
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1. The dag combiner can start using alias analysis to realize that y/x
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don't alias, making the store to X not dependent on the load from Y.
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2. The generated isel could be made smarter in the case it can't
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disambiguate the pointers.
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Number 1 is the preferred solution.
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This has been "fixed" by a TableGen hack. But that is a short term workaround
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which will be removed once the proper fix is made.
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//===---------------------------------------------------------------------===//
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Turn this into a signed shift right in instcombine:
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int f(unsigned x) {
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return x >> 31 ? -1 : 0;
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}
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25600
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http://gcc.gnu.org/ml/gcc-patches/2006-02/msg01492.html
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//===---------------------------------------------------------------------===//
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On targets with expensive 64-bit multiply, we could LSR this:
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for (i = ...; ++i) {
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x = 1ULL << i;
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into:
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long long tmp = 1;
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for (i = ...; ++i, tmp+=tmp)
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x = tmp;
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This would be a win on ppc32, but not x86 or ppc64.
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//===---------------------------------------------------------------------===//
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Shrink: (setlt (loadi32 P), 0) -> (setlt (loadi8 Phi), 0)
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//===---------------------------------------------------------------------===//
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Reassociate should turn: X*X*X*X -> t=(X*X) (t*t) to eliminate a multiply.
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//===---------------------------------------------------------------------===//
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Interesting? testcase for add/shift/mul reassoc:
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int bar(int x, int y) {
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return x*x*x+y+x*x*x*x*x*y*y*y*y;
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}
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int foo(int z, int n) {
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return bar(z, n) + bar(2*z, 2*n);
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}
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//===---------------------------------------------------------------------===//
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These two functions should generate the same code on big-endian systems:
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int g(int *j,int *l) { return memcmp(j,l,4); }
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int h(int *j, int *l) { return *j - *l; }
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this could be done in SelectionDAGISel.cpp, along with other special cases,
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for 1,2,4,8 bytes.
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//===---------------------------------------------------------------------===//
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This code:
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int rot(unsigned char b) { int a = ((b>>1) ^ (b<<7)) & 0xff; return a; }
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Can be improved in two ways:
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1. The instcombiner should eliminate the type conversions.
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2. The X86 backend should turn this into a rotate by one bit.
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//===---------------------------------------------------------------------===//
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Add LSR exit value substitution. It'll probably be a win for Ackermann, etc.
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//===---------------------------------------------------------------------===//
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It would be nice to revert this patch:
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http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20060213/031986.html
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And teach the dag combiner enough to simplify the code expanded before
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legalize. It seems plausible that this knowledge would let it simplify other
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stuff too.
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//===---------------------------------------------------------------------===//
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The loop unroller should be enhanced to be able to unroll loops that aren't
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single basic blocks. It should be able to handle stuff like this:
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for (i = 0; i < c1; ++i)
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if (c2 & (1 << i))
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foo
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where c1/c2 are constants.
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//===---------------------------------------------------------------------===//
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For packed types, TargetData.cpp::getTypeInfo() returns alignment that is equal
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to the type size. It works but can be overly conservative as the alignment of
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specific packed types are target dependent.
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//===---------------------------------------------------------------------===//
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We should add 'unaligned load/store' nodes, and produce them from code like
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this:
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v4sf example(float *P) {
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return (v4sf){P[0], P[1], P[2], P[3] };
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}
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//===---------------------------------------------------------------------===//
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We should constant fold packed type casts at the LLVM level, regardless of the
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cast. Currently we cannot fold some casts because we don't have TargetData
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information in the constant folder, so we don't know the endianness of the
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target!
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//===---------------------------------------------------------------------===//
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Consider this:
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unsigned short swap_16(unsigned short v) { return (v>>8) | (v<<8); }
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Compiled with the ppc backend:
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_swap_16:
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slwi r2, r3, 8
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srwi r3, r3, 8
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or r2, r3, r2
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rlwinm r3, r2, 0, 16, 31
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blr
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The rlwinm (an and by 65535) is dead. The dag combiner should propagate bits
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better than that to see this.
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//===---------------------------------------------------------------------===//
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