llvm-6502/lib/Target
Misha Brukman 91aee47a1b Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
Here I had to make one non-trivial change: add a function to get a version of
the opcode that takes an immediate, given an opcode that takes all registers.

This is required because sometimes it is not known at construction time which
opcode is used because opcodes are passed around between functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6375 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:37:00 +00:00
..
CBackend Add support for setjmp/longjmp primitives 2003-05-17 22:26:33 +00:00
SparcV9 Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed. 2003-05-27 22:37:00 +00:00
X86 Renamed opIsDef to opIsDefOnly. 2003-05-27 00:03:17 +00:00
Makefile X86 target builds fine now 2002-11-20 20:17:03 +00:00
MRegisterInfo.cpp Capture more information in ctor 2002-12-28 20:34:18 +00:00
TargetData.cpp * Fix divide by zero error with empty structs 2003-05-21 18:08:44 +00:00
TargetInstrInfo.cpp Rename MachineInstrInfo -> TargetInstrInfo 2003-01-14 22:00:31 +00:00
TargetMachine.cpp The promotion rules are the same for all targets, they are set by the C standard. 2003-04-26 19:47:36 +00:00
TargetSchedInfo.cpp More renamings of Target/Machine*Info to Target/Target*Info 2002-12-29 03:13:05 +00:00