Bill Wendling 1203fe7fc8 Revert r141854 because it was causing failures: ... http://lab.llvm.org:8011/builders/llvm-x86_64-linux/builds/101 --- Reverse-merging r141854 into '.': U test/MC/Disassembler/X86/x86-32.txt U test/MC/Disassembler/X86/simple-tests.txt D test/CodeGen/X86/bmi.ll U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86.td U lib/Target/X86/X86Subtarget.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141857 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-13 07:48:07 +00:00
..
dg.exp
enhanced.txt	Insert dummy ED table entries for pseudo-instructions.	2011-10-10 18:30:16 +00:00
intel-syntax.txt	Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.	2011-10-02 21:08:12 +00:00
invalid-VEX-vvvv.txt	Add test case for PR10851.	2011-09-14 04:36:54 +00:00
simple-tests.txt	Revert r141854 because it was causing failures:	2011-10-13 07:48:07 +00:00
truncated-input.txt
x86-32.txt	Revert r141854 because it was causing failures:	2011-10-13 07:48:07 +00:00