Akira Hatanaka 46ac94ba8b O64 will not be supported. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139421 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-09 22:22:48 +00:00
..
InstPrinter	80 columns.	2011-09-09 00:13:35 +00:00
MCTargetDesc	Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson.	2011-09-07 17:24:38 +00:00
TargetInfo	Move TargetRegistry and TargetSelect from Target to Support where they belong.	2011-08-24 18:08:43 +00:00
CMakeLists.txt
Makefile
Mips.h
Mips.td	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsAsmPrinter.cpp	O64 will not be supported.	2011-09-09 22:22:48 +00:00
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp
MipsDelaySlotFiller.cpp	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsEmitGPRestore.cpp
MipsExpandPseudo.cpp
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td	Changed definition of EXT and INS per Bruno's comments.	2011-08-17 22:59:46 +00:00
MipsInstrFPU.td	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsInstrInfo.cpp	Move TargetRegistry and TargetSelect from Target to Support where they belong.	2011-08-24 18:08:43 +00:00
MipsInstrInfo.h
MipsInstrInfo.td	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsISelDAGToDAG.cpp	Fix handling of double precision loads and stores when Mips1 is targeted.	2011-08-16 03:51:51 +00:00
MipsISelLowering.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
MipsISelLowering.h	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsMachineFunction.h
MipsMCInstLower.cpp	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsMCInstLower.h	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsMCSymbolRefExpr.cpp
MipsMCSymbolRefExpr.h
MipsRegisterInfo.cpp	Make F31 and D15 non-reserved registers.	2011-09-09 22:11:26 +00:00
MipsRegisterInfo.h
MipsRegisterInfo.td	Make F31 and D15 non-reserved registers.	2011-09-09 22:11:26 +00:00
MipsRelocations.h
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp	Drop support for Mips1 and Mips2.	2011-09-09 20:45:50 +00:00
MipsSubtarget.h	O64 will not be supported.	2011-09-09 22:22:48 +00:00
MipsTargetMachine.cpp	Move TargetRegistry and TargetSelect from Target to Support where they belong.	2011-08-24 18:08:43 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h