Chandler Carruth 9277ad2d36 [x86] Add an explicit SSE3 run to this test and flesh out a bunch of ... missing specific checks. While there is a lot of redundancy here where all-but-one mode use the same code generation, I'd rather have each variant spelled out and checked so that readers aren't misled by an omission in the test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217765 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-15 11:40:20 +00:00
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Analysis	[ARM] Teach the cost model that cross-class copies are costly.	2014-09-12 13:29:40 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[x86] Add an explicit SSE3 run to this test and flesh out a bunch of	2014-09-15 11:40:20 +00:00
DebugInfo
ExecutionEngine	[MCJIT] Make sure we test ARM BR24 relocations with both internal and external	2014-09-11 22:43:36 +00:00
Feature	[AArch64] Update test case to pass with post-RA MI scheduler.	2014-09-13 03:23:23 +00:00
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC	[mips][microMIPS] Implement JRADDIUSP instruction	2014-09-12 14:29:54 +00:00
Object
Other	[lit] Parse all strings as UTF-8 rather than ASCII.	2014-09-12 16:46:05 +00:00
TableGen
tools	Stop suppress error messages in test case to see why one buildbot is failing	2014-09-12 22:46:01 +00:00
Transforms	InstSimplify: Simplify trivial and/or of icmps	2014-09-15 08:15:28 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh