llvm-6502/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
Joey Gouly 4cbbbf49b6 This reverts r155000.
The cdp2 instruction should have the same restrictions as cdp on the
co-processor registers.

VFP instructions on v8/AArch32 share the same encoding space as cdp2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-20 17:42:36 +00:00

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# RUN: llvm-mc --disassemble %s -triple=arm 2>&1 | FileCheck %s
# CHECK: invalid instruction encoding
0xe0 0x6a 0x0c 0xfe