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4cbbbf49b6
The cdp2 instruction should have the same restrictions as cdp on the co-processor registers. VFP instructions on v8/AArch32 share the same encoding space as cdp2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184445 91177308-0d34-0410-b5e6-96231b3b80d8
5 lines
123 B
Plaintext
5 lines
123 B
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm 2>&1 | FileCheck %s
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# CHECK: invalid instruction encoding
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0xe0 0x6a 0x0c 0xfe
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