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https://github.com/c64scene-ar/llvm-6502.git
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92b1dfe5d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95260 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
1.9 KiB
C++
76 lines
1.9 KiB
C++
//===-- X86/X86MCCodeEmitter.cpp - Convert X86 code to machine code -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the X86MCCodeEmitter class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "x86-emitter"
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#include "X86.h"
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#include "X86InstrInfo.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace {
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class X86MCCodeEmitter : public MCCodeEmitter {
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X86MCCodeEmitter(const X86MCCodeEmitter &); // DO NOT IMPLEMENT
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void operator=(const X86MCCodeEmitter &); // DO NOT IMPLEMENT
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const TargetMachine &TM;
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const TargetInstrInfo &TII;
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public:
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X86MCCodeEmitter(TargetMachine &tm)
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: TM(tm), TII(*TM.getInstrInfo()) {
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}
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~X86MCCodeEmitter() {}
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void EmitByte(unsigned char C, raw_ostream &OS) const {
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OS << (char)C;
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}
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS) const;
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};
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} // end anonymous namespace
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MCCodeEmitter *llvm::createX86MCCodeEmitter(const Target &,
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TargetMachine &TM) {
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return new X86MCCodeEmitter(TM);
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}
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void X86MCCodeEmitter::
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EncodeInstruction(const MCInst &MI, raw_ostream &OS) const {
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unsigned Opcode = MI.getOpcode();
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const TargetInstrDesc &Desc = TII.get(Opcode);
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// Emit the lock opcode prefix as needed.
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if (Desc.TSFlags & X86II::LOCK)
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EmitByte(0xF0, OS);
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// Emit segment override opcode prefix as needed.
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switch (Desc.TSFlags & X86II::SegOvrMask) {
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default: assert(0 && "Invalid segment!");
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case 0: break; // No segment override!
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case X86II::FS:
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EmitByte(0x64, OS);
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break;
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case X86II::GS:
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EmitByte(0x65, OS);
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break;
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}
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}
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