llvm-6502/test/CodeGen
Hal Finkel 92b38a9d1c Remove extra truncs/exts around i32 bit operations on PPC64
This generalizes the code to eliminate extra truncs/exts around i1 bit
operations to also do the same on PPC64 for i32 bit operations. This eliminates
a fairly prevalent code wart:

int foo(int a) {
  return a == 5 ? 7 : 8;
}

On PPC64, because of the extension implied by the ABI, this would generate:

	cmplwi 0, 3, 5
	li 12, 8
	li 4, 7
	isel 3, 4, 12, 2
	rldicl 3, 3, 0, 32
	blr

where the 'rldicl 3, 3, 0, 32', the extension, is completely unnecessary. At
least for the single-BB case (which is all that the DAG combine mechanism can
handle), this unnecessary extension is no longer generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202600 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 21:36:57 +00:00
..
AArch64
ARM Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now 2014-02-27 17:56:08 +00:00
CPP
Generic CommandLine: Exit successfully for -version and -help 2014-02-28 19:08:01 +00:00
Hexagon
Inputs
Mips Fixed operand of SC microMIPS instruction. 2014-02-28 18:22:56 +00:00
MSP430
NVPTX
PowerPC Remove extra truncs/exts around i32 bit operations on PPC64 2014-03-01 21:36:57 +00:00
R600 R600/SI: Expand all v16[if]32 operations 2014-02-28 21:36:37 +00:00
SPARC [Sparc] Add support for parsing directives in SparcAsmParser. 2014-03-01 02:18:04 +00:00
SystemZ
Thumb
Thumb2
X86 SpillPlacement: fix a bug in iterate. 2014-02-28 23:05:31 +00:00
XCore [XCore] Support functions returning more than 4 words. 2014-02-27 17:47:54 +00:00