mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-30 02:32:08 +00:00
8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
104 lines
3.8 KiB
LLVM
104 lines
3.8 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -enable-misched < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}frem_f32:
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; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{.*$}}
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; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{.*}} offset:0x10
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; SI-DAG: v_cmp
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; SI-DAG: v_mul_f32
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; SI: v_rcp_f32_e32
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; SI: v_mul_f32_e32
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; SI: v_mul_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_mad_f32
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; SI: s_endpgm
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define void @frem_f32(float addrspace(1)* %out, float addrspace(1)* %in1,
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float addrspace(1)* %in2) #0 {
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%gep2 = getelementptr float addrspace(1)* %in2, i32 4
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%r0 = load float addrspace(1)* %in1, align 4
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%r1 = load float addrspace(1)* %gep2, align 4
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%r2 = frem float %r0, %r1
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store float %r2, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}unsafe_frem_f32:
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; SI: buffer_load_dword [[Y:v[0-9]+]], {{.*}} offset:0x10
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; SI: buffer_load_dword [[X:v[0-9]+]], {{.*}}
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; SI: v_rcp_f32_e32 [[INVY:v[0-9]+]], [[Y]]
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; SI: v_mul_f32_e32 [[DIV:v[0-9]+]], [[INVY]], [[X]]
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; SI: v_trunc_f32_e32 [[TRUNC:v[0-9]+]], [[DIV]]
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], -[[TRUNC]], [[Y]], [[X]]
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; SI: buffer_store_dword [[RESULT]]
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; SI: s_endpgm
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define void @unsafe_frem_f32(float addrspace(1)* %out, float addrspace(1)* %in1,
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float addrspace(1)* %in2) #1 {
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%gep2 = getelementptr float addrspace(1)* %in2, i32 4
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%r0 = load float addrspace(1)* %in1, align 4
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%r1 = load float addrspace(1)* %gep2, align 4
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%r2 = frem float %r0, %r1
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store float %r2, float addrspace(1)* %out, align 4
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ret void
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}
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; TODO: This should check something when f64 fdiv is implemented
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; correctly
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; FUNC-LABEL: {{^}}frem_f64:
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; SI: s_endpgm
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define void @frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
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double addrspace(1)* %in2) #0 {
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%r0 = load double addrspace(1)* %in1, align 8
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%r1 = load double addrspace(1)* %in2, align 8
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%r2 = frem double %r0, %r1
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store double %r2, double addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}unsafe_frem_f64:
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; SI: v_rcp_f64_e32
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; SI: v_mul_f64
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; SI: v_bfe_u32
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; SI: v_fma_f64
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; SI: s_endpgm
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define void @unsafe_frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
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double addrspace(1)* %in2) #1 {
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%r0 = load double addrspace(1)* %in1, align 8
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%r1 = load double addrspace(1)* %in2, align 8
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%r2 = frem double %r0, %r1
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store double %r2, double addrspace(1)* %out, align 8
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ret void
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}
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define void @frem_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in1,
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<2 x float> addrspace(1)* %in2) #0 {
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%gep2 = getelementptr <2 x float> addrspace(1)* %in2, i32 4
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%r0 = load <2 x float> addrspace(1)* %in1, align 8
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%r1 = load <2 x float> addrspace(1)* %gep2, align 8
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%r2 = frem <2 x float> %r0, %r1
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store <2 x float> %r2, <2 x float> addrspace(1)* %out, align 8
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ret void
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}
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define void @frem_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in1,
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<4 x float> addrspace(1)* %in2) #0 {
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%gep2 = getelementptr <4 x float> addrspace(1)* %in2, i32 4
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%r0 = load <4 x float> addrspace(1)* %in1, align 16
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%r1 = load <4 x float> addrspace(1)* %gep2, align 16
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%r2 = frem <4 x float> %r0, %r1
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store <4 x float> %r2, <4 x float> addrspace(1)* %out, align 16
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ret void
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}
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define void @frem_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %in1,
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<2 x double> addrspace(1)* %in2) #0 {
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%gep2 = getelementptr <2 x double> addrspace(1)* %in2, i32 4
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%r0 = load <2 x double> addrspace(1)* %in1, align 16
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%r1 = load <2 x double> addrspace(1)* %gep2, align 16
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%r2 = frem <2 x double> %r0, %r1
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store <2 x double> %r2, <2 x double> addrspace(1)* %out, align 16
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ret void
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}
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attributes #0 = { nounwind "unsafe-fp-math"="false" }
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attributes #1 = { nounwind "unsafe-fp-math"="true" }
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