mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
229 lines
6.4 KiB
LLVM
229 lines
6.4 KiB
LLVM
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}ngroups_x:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[0].X
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @ngroups_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.ngroups.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}ngroups_y:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[0].Y
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @ngroups_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.ngroups.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}ngroups_z:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[0].Z
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @ngroups_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.ngroups.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_size_x:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[0].W
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x3
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @global_size_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.global.size.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_size_y:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[1].X
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @global_size_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.global.size.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_size_z:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[1].Y
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x5
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @global_size_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.global.size.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_size_x:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[1].Z
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x6
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @local_size_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.local.size.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_size_y:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[1].W
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x7
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @local_size_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.local.size.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_size_z:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[2].X
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x8
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @local_size_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.local.size.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}get_work_dim:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV [[VAL]], KC0[2].Z
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; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xb
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VVAL]]
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define void @get_work_dim (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.AMDGPU.read.workdim() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; The tgid values are stored in sgprs offset by the number of user sgprs.
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; Currently we always use exactly 2 user sgprs for the pointer to the
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; kernel arguments, but this may change in the future.
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; FUNC-LABEL: {{^}}tgid_x:
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], s4
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; SI: buffer_store_dword [[VVAL]]
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define void @tgid_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tgid.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}tgid_y:
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], s5
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; SI: buffer_store_dword [[VVAL]]
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define void @tgid_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tgid.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}tgid_z:
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; SI: v_mov_b32_e32 [[VVAL:v[0-9]+]], s6
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; SI: buffer_store_dword [[VVAL]]
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define void @tgid_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tgid.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}tidig_x:
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; SI: buffer_store_dword v0
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define void @tidig_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}tidig_y:
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; SI: buffer_store_dword v1
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define void @tidig_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}tidig_z:
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; SI: buffer_store_dword v2
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define void @tidig_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.r600.read.ngroups.x() #0
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declare i32 @llvm.r600.read.ngroups.y() #0
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declare i32 @llvm.r600.read.ngroups.z() #0
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declare i32 @llvm.r600.read.global.size.x() #0
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declare i32 @llvm.r600.read.global.size.y() #0
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declare i32 @llvm.r600.read.global.size.z() #0
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declare i32 @llvm.r600.read.local.size.x() #0
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declare i32 @llvm.r600.read.local.size.y() #0
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declare i32 @llvm.r600.read.local.size.z() #0
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declare i32 @llvm.r600.read.tgid.x() #0
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declare i32 @llvm.r600.read.tgid.y() #0
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declare i32 @llvm.r600.read.tgid.z() #0
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declare i32 @llvm.r600.read.tidig.x() #0
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declare i32 @llvm.r600.read.tidig.y() #0
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declare i32 @llvm.r600.read.tidig.z() #0
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declare i32 @llvm.AMDGPU.read.workdim() #0
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attributes #0 = { readnone }
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