llvm-6502/test/MC
Craig Topper 95717dbb11 [X86] Fix a bug where the disassembler was ignoring the VEX.W bit in 32-bit mode for certain instructions it shouldn't.
Unfortunately, this isn't easy to fix since there's no simple way to figure out from the disassembler tables whether the W-bit is being used to select a 64-bit GPR or if its a required part of the opcode. The fix implemented here just looks for "64" in the instruction name and ignores the W-bit in 32-bit mode if its present.

Fixes PR21169.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219194 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-07 07:29:50 +00:00
..
AArch64 [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
ARM Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
AsmParser MC: AsmLexer: handle multi-character CommentStrings correctly 2014-08-14 02:51:43 +00:00
COFF WinCOFFObjectWriter: optimize the string table for common suffices 2014-09-29 22:43:20 +00:00
Disassembler [X86] Fix a bug where the disassembler was ignoring the VEX.W bit in 32-bit mode for certain instructions it shouldn't. 2014-10-07 07:29:50 +00:00
ELF Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
MachO MachObjectWriter: optimize the string table for common suffices 2014-10-06 17:05:19 +00:00
Markup
Mips [mips] Print warning when using register names not available in N32/64 2014-10-03 15:37:37 +00:00
PowerPC Object: BSS/virtual sections don't have contents 2014-09-26 22:32:16 +00:00
Sparc
SystemZ Exclude known and bugzilled failures from UBSan bootstrap 2014-09-17 20:17:52 +00:00
X86 MC: Use @IMGREL instead of @IMGREL32, which we can't parse 2014-09-25 02:09:18 +00:00