Sanjay Patel 93411cf4f8 fixed to test features, not CPUs ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228581 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-09 17:17:09 +00:00
..
AArch64	ARM & AArch64: teach LowerVSETCC that output type size may differ from input.	2015-02-08 00:50:47 +00:00
ARM	Fix a bug in DemoteRegToStack where a reload instruction was inserted into the	2015-02-09 06:38:23 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Simplifying and formatting several patterns. Changing a pattern multiply to be expanded.	2015-02-05 21:13:25 +00:00
Inputs
Mips	[mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructions	2015-02-04 15:43:17 +00:00
MSP430
NVPTX	[NVPTX] Emit .pragma "nounroll" for loops marked with nounroll	2015-02-01 02:27:45 +00:00
PowerPC	This change implements the following three logical vector operations:	2015-02-09 17:03:18 +00:00
R600	R600/SI: Amend a test to ensure WQM is enabled for LDS in pixel shaders	2015-02-06 02:51:29 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	fixed to test features, not CPUs	2015-02-09 17:17:09 +00:00
XCore