Akira Hatanaka 9367b8d4f2 [mips] v4i8 and v2i16 add, sub and mul instruction selection patterns. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179420 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-12 22:14:24 +00:00
..
AArch64	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
ARM	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
CPP
Generic
Hexagon
Inputs
MBlaze
Mips	[mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.	2013-04-12 22:14:24 +00:00
MSP430
NVPTX
PowerPC	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
R600	R600/SI: Add pattern for AMDGPUurecip	2013-04-10 17:17:56 +00:00
SI
SPARC	Compute correct frame sizes for SPARC v9 64-bit frames.	2013-04-09 04:37:47 +00:00
Thumb
Thumb2
X86	Fix the test on linux by setting the triple and the align format	2013-04-12 01:07:16 +00:00
XCore