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https://github.com/c64scene-ar/llvm-6502.git
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55cfb52aa3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191853 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
1.9 KiB
LLVM
72 lines
1.9 KiB
LLVM
; RUN: opt -S -loop-vectorize -force-vector-unroll=1 -force-vector-width=2 < %s | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
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@f = common global i32 0, align 4
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@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
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@c = common global i32 0, align 4
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@a = common global i32 0, align 4
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@b = common global i32 0, align 4
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@e = common global i32 0, align 4
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; We used to vectorize this loop. But it has a value that is used outside of the
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; and is not a recognized reduction variable "tmp17".
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; CHECK-LABEL: @main(
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; CHECK-NOT: <2 x i32>
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define i32 @main() {
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bb:
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%b.promoted = load i32* @b, align 4
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br label %.lr.ph.i
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.lr.ph.i:
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%tmp8 = phi i32 [ %tmp18, %bb16 ], [ %b.promoted, %bb ]
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%tmp2 = icmp sgt i32 %tmp8, 10
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br i1 %tmp2, label %bb16, label %bb10
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bb10:
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br label %bb16
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bb16:
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%tmp17 = phi i32 [ 0, %bb10 ], [ 1, %.lr.ph.i ]
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%tmp18 = add nsw i32 %tmp8, 1
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%tmp19 = icmp slt i32 %tmp18, 4
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br i1 %tmp19, label %.lr.ph.i, label %f1.exit.loopexit
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f1.exit.loopexit:
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%.lcssa = phi i32 [ %tmp17, %bb16 ]
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ret i32 %.lcssa
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}
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; Don't vectorize this loop. Its phi node (induction variable) has an outside
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; loop user. We currently don't handle this case.
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; PR17179
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; CHECK-LABEL: @test2(
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; CHECK-NOT: <2 x
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@x1 = common global i32 0, align 4
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@x2 = common global i32 0, align 4
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@x0 = common global i32 0, align 4
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define i32 @test2() {
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entry:
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store i32 0, i32* @x1, align 4
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%0 = load i32* @x0, align 4
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br label %for.cond1.preheader
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for.cond1.preheader:
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%inc7 = phi i32 [ 0, %entry ], [ %inc, %for.cond1.preheader ]
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%inc = add nsw i32 %inc7, 1
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%cmp = icmp eq i32 %inc, 52
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br i1 %cmp, label %for.end5, label %for.cond1.preheader
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for.end5:
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%inc7.lcssa = phi i32 [ %inc7, %for.cond1.preheader ]
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%xor = xor i32 %inc7.lcssa, %0
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store i32 52, i32* @x1, align 4
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store i32 1, i32* @x2, align 4
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ret i32 %xor
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}
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