Manman Ren d68e8cda24 Disable rematerialization in TwoAddressInstructionPass. ... It is redundant; RegisterCoalescer will do the remat if it can't eliminate the copy. Collected instruction counts before and after this. A few extra instructions are generated due to spilling but it is normal to see these kinds of changes with almost any small codegen change, according to Jakob. This also fixed rdar://11830760 where xor is expected instead of movi0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160749 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-25 18:28:13 +00:00
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ARM	[arm-fast-isel] Add support for vararg function calls.	2012-07-19 09:49:00 +00:00
CellSPU	Implement r160312 as target indepedenet dag combine.	2012-07-17 08:31:11 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be wider than the output element type. Make sure to trunc them if needed.	2012-07-15 20:39:08 +00:00
Hexagon
MBlaze
Mips	Eliminate the stack slot used to save the global base register.	2012-07-25 03:16:47 +00:00
MSP430
NVPTX
PowerPC	Fix the remaining TCL-style quotes found in the testsuite. This is	2012-07-02 19:09:46 +00:00
SPARC	test/CodeGen/SPARC/private.ll: Fixup. Forgot to prune old RUN lines.	2012-07-03 04:29:20 +00:00
Thumb	Fix the remaining TCL-style quotes found in the testsuite. This is	2012-07-02 19:09:46 +00:00
Thumb2	[arm-fast-isel] Add support for vararg function calls.	2012-07-19 09:49:00 +00:00
X86	Disable rematerialization in TwoAddressInstructionPass.	2012-07-25 18:28:13 +00:00
XCore