mirror of
https://github.com/c64scene-ar/llvm-6502.git
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a210db781f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178134 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
1.8 KiB
LLVM
59 lines
1.8 KiB
LLVM
; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s | FileCheck -check-prefix=DISABLED %s
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; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=ENABLED %s
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; CHECK-ENABLED: t1:
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; CHECK-DISABLED: t1:
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define <2 x float> @t1(float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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%i1 = insertelement <2 x float> undef, float %f, i32 1
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%i2 = fadd <2 x float> %i1, %i1
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ret <2 x float> %i2
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}
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; CHECK-ENABLED: t2:
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; CHECK-DISABLED: t2:
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define <4 x float> @t2(float %g, float %f) {
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; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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%i1 = insertelement <4 x float> undef, float %f, i32 1
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%i2 = fadd <4 x float> %i1, %i1
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ret <4 x float> %i2
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}
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; CHECK-ENABLED: t3:
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; CHECK-DISABLED: t3:
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define arm_aapcs_vfpcc <2 x float> @t3(float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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%i1 = insertelement <2 x float> undef, float %f, i32 1
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%i2 = fadd <2 x float> %i1, %i1
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ret <2 x float> %i2
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}
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; CHECK-ENABLED: t4:
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; CHECK-DISABLED: t4:
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define <2 x float> @t4(float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup
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%i1 = insertelement <2 x float> undef, float %f, i32 1
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br label %b
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; Block %b has an S-reg as live-in.
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b:
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%i2 = fadd <2 x float> %i1, %i1
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ret <2 x float> %i2
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}
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; CHECK-ENABLED: t5:
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; CHECK-DISABLED: t5:
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define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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; CHECK-ENABLED: vadd.f32
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; CHECK-ENABLED-NEXT: bx lr
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; CHECK-DISABLED-NOT: vdup
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%i1 = insertelement <4 x float> %q, float %f, i32 1
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%i2 = fadd <4 x float> %i1, %i1
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ret <4 x float> %i2
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}
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