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https://github.com/c64scene-ar/llvm-6502.git
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86245071b5
Print the range of registers used with a single letter prefix. This better matches what the shader compiler produces and is overall less obnoxious than concatenating all of the subregister names together. Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1, it will print s[0:1] and so on. There doesn't appear to be a straightforward way to get the actual register info in the InstPrinter, so this parses the generated name to print with the new syntax. The required test changes are pretty nasty, and register matching regexes are now worse. Since there isn't a way to add to a variable in FileCheck, some of the tests now don't check the exact number of registers used, but I don't think that will be a real problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194443 91177308-0d34-0410-b5e6-96231b3b80d8
53 lines
1.5 KiB
LLVM
53 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
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; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
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; BFI_INT Definition pattern from ISA docs
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; (y & x) | (z & ~x)
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;
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; R600-CHECK: @bfi_def
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; R600-CHECK: BFI_INT
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; SI-CHECK: @bfi_def
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; SI-CHECK: V_BFI_B32
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define void @bfi_def(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) {
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entry:
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%0 = xor i32 %x, -1
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%1 = and i32 %z, %0
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%2 = and i32 %y, %x
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%3 = or i32 %1, %2
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; SHA-256 Ch function
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; z ^ (x & (y ^ z))
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; R600-CHECK: @bfi_sha256_ch
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; R600-CHECK: BFI_INT
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; SI-CHECK: @bfi_sha256_ch
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; SI-CHECK: V_BFI_B32
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define void @bfi_sha256_ch(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) {
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entry:
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%0 = xor i32 %y, %z
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%1 = and i32 %x, %0
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%2 = xor i32 %z, %1
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store i32 %2, i32 addrspace(1)* %out
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ret void
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}
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; SHA-256 Ma function
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; ((x & z) | (y & (x | z)))
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; R600-CHECK: @bfi_sha256_ma
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; R600-CHECK: XOR_INT * [[DST:T[0-9]+\.[XYZW]]], KC0[2].Z, KC0[2].W
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; R600-CHECK: BFI_INT * {{T[0-9]+\.[XYZW]}}, {{[[DST]]|PV\.[XYZW]}}, KC0[3].X, KC0[2].W
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; SI-CHECK: V_XOR_B32_e64 [[DST:v[0-9]+]], {{[sv][0-9]+, v[0-9]+}}
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; SI-CHECK: V_BFI_B32 {{v[0-9]+}}, [[DST]], {{[sv][0-9]+, [sv][0-9]+}}
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define void @bfi_sha256_ma(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) {
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entry:
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%0 = and i32 %x, %z
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%1 = or i32 %x, %z
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%2 = and i32 %y, %1
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%3 = or i32 %0, %2
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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