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https://github.com/c64scene-ar/llvm-6502.git
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d85934b3e5
This makes it explicit when ScoreboardHazardRecognizer will be used. "GenericItineraries" would only make sense if it contained real itinerary values and still required ScoreboardHazardRecognizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158963 91177308-0d34-0410-b5e6-96231b3b80d8
74 lines
3.2 KiB
TableGen
74 lines
3.2 KiB
TableGen
//===-- MBlaze.td - Describe the MBlaze Target Machine -----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the MBlaze target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===----------------------------------------------------------------------===//
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// Register File, Calling Conv, Instruction Descriptions
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//===----------------------------------------------------------------------===//
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include "MBlazeRegisterInfo.td"
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include "MBlazeSchedule.td"
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include "MBlazeIntrinsics.td"
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include "MBlazeInstrInfo.td"
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include "MBlazeCallingConv.td"
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def MBlazeInstrInfo : InstrInfo;
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//===----------------------------------------------------------------------===//
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// Microblaze Subtarget features //
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//===----------------------------------------------------------------------===//
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def FeatureBarrel : SubtargetFeature<"barrel", "HasBarrel", "true",
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"Implements barrel shifter">;
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def FeatureDiv : SubtargetFeature<"div", "HasDiv", "true",
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"Implements hardware divider">;
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def FeatureMul : SubtargetFeature<"mul", "HasMul", "true",
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"Implements hardware multiplier">;
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def FeaturePatCmp : SubtargetFeature<"patcmp", "HasPatCmp", "true",
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"Implements pattern compare instruction">;
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def FeatureFPU : SubtargetFeature<"fpu", "HasFPU", "true",
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"Implements floating point unit">;
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def FeatureMul64 : SubtargetFeature<"mul64", "HasMul64", "true",
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"Implements multiplier with 64-bit result">;
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def FeatureSqrt : SubtargetFeature<"sqrt", "HasSqrt", "true",
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"Implements sqrt and floating point convert">;
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//===----------------------------------------------------------------------===//
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// MBlaze processors supported.
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//===----------------------------------------------------------------------===//
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def : Processor<"mblaze", NoItineraries, []>;
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def : Processor<"mblaze3", MBlazePipe3Itineraries, []>;
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def : Processor<"mblaze5", MBlazePipe5Itineraries, []>;
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//===----------------------------------------------------------------------===//
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// Instruction Descriptions
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//===----------------------------------------------------------------------===//
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def MBlazeAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Target Declaration
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//===----------------------------------------------------------------------===//
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def MBlaze : Target {
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let InstructionSet = MBlazeInstrInfo;
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let AssemblyWriters = [MBlazeAsmWriter];
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}
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