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llvm-6502/test/CodeGen/PowerPC
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Hal Finkel 159e7f4095 [PowerPC] Lower VSELECT using xxsel when VSX is available 
With VSX there is a real vector select instruction, and so we should use it.
Note that VSELECT will still scalarize for v2f64 because the corresponding
SetCC result type (v2i64) is not currently a legal type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 12:49:28 +00:00
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2004-11-29-ShrCrash.ll
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2004-11-30-shift-crash.ll
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2004-11-30-shr-var-crash.ll
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2004-12-12-ZeroSizeCommon.ll
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2005-01-14-SetSelectCrash.ll
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2005-01-14-UndefLong.ll
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2005-08-12-rlwimi-crash.ll
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2005-09-02-LegalizeDuplicatesCalls.ll
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2005-10-08-ArithmeticRotate.ll
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2005-11-30-vastart-crash.ll
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2006-01-11-darwin-fp-argument.ll
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2006-01-20-ShiftPartsCrash.ll
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2006-04-01-FloatDoubleExtend.ll
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2006-04-05-splat-ish.ll
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2006-04-19-vmaddfp-crash.ll
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2006-05-12-rlwimi-crash.ll
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2006-07-07-ComputeMaskedBits.ll
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2006-07-19-stwbrx-crash.ll
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2006-08-11-RetVector.ll
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2006-08-15-SelectionCrash.ll
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2006-09-28-shift_64.ll
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2006-10-13-Miscompile.ll
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2006-10-17-brcc-miscompile.ll
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2006-10-17-ppc64-alloca.ll
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2006-11-10-DAGCombineMiscompile.ll
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2006-11-29-AltivecFPSplat.ll
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2006-12-07-LargeAlloca.ll
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2006-12-07-SelectCrash.ll
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2007-01-04-ArgExtension.ll
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2007-01-15-AsmDialect.ll
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2007-01-29-lbrx-asm.ll
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2007-01-31-InlineAsmAddrMode.ll
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2007-02-16-AlignPacked.ll
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2007-02-16-InlineAsmNConstraint.ll
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2007-02-23-lr-saved-twice.ll
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2007-03-24-cntlzd.ll
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2007-03-30-SpillerCrash.ll
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2007-04-24-InlineAsm-I-Modifier.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
2007-04-30-InlineAsmEarlyClobber.ll
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2007-05-03-InlineAsm-S-Constraint.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
2007-05-14-InlineAsmSelectCrash.ll
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2007-05-22-tailmerge-3.ll
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2007-05-30-dagcombine-miscomp.ll
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2007-06-28-BCCISelBug.ll
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2007-08-04-CoalescerAssert.ll
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2007-09-04-AltivecDST.ll
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2007-09-07-LoadStoreIdxForms.ll
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2007-09-08-unaligned.ll
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2007-09-11-RegCoalescerAssert.ll
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2007-09-12-LiveIntervalsAssert.ll
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2007-10-16-InlineAsmFrameOffset.ll
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2007-10-18-PtrArithmetic.ll
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2007-10-21-LocalRegAllocAssert2.ll
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2007-10-21-LocalRegAllocAssert.ll
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2007-11-04-CoalescerCrash.ll
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2007-11-16-landingpad-split.ll
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2007-11-19-VectorSplitting.ll
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2008-02-05-LiveIntervalsAssert.ll
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2008-02-09-LocalRegAllocAssert.ll
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2008-03-05-RegScavengerAssert.ll
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2008-03-17-RegScavengerCrash.ll
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2008-03-18-RegScavengerAssert.ll
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2008-03-24-AddressRegImm.ll
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2008-03-24-CoalescerBug.ll
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2008-03-26-CoalescerBug.ll
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2008-04-10-LiveIntervalCrash.ll
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2008-04-16-CoalescerBug.ll
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2008-04-23-CoalescerCrash.ll
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2008-05-01-ppc_fp128.ll
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2008-06-19-LegalizerCrash.ll
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2008-06-21-F128LoadStore.ll
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2008-06-23-LiveVariablesCrash.ll
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2008-07-10-SplatMiscompile.ll
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2008-07-15-Bswap.ll
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2008-07-15-Fabs.ll
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2008-07-15-SignExtendInreg.ll
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2008-07-17-Fneg.ll
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2008-07-24-PPC64-CCBug.ll
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2008-09-12-CoalescerBug.ll
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2008-10-17-AsmMatchingOperands.ll
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2008-10-28-f128-i32.ll
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2008-10-28-UnprocessedNode.ll
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2008-10-31-PPCF128Libcalls.ll
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2008-12-02-LegalizeTypeAssert.ll
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2009-01-16-DeclareISelBug.ll
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2009-03-17-LSRBug.ll
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2009-05-28-LegalizeBRCC.ll
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2009-07-16-InlineAsm-M-Operand.ll
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2009-08-17-inline-asm-addr-mode-breakage.ll
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2009-09-18-carrybit.ll
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2009-11-15-ProcImpDefsBug.ll
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2009-11-25-ImpDefBug.ll
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2010-02-04-EmptyGlobal.ll
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2010-02-12-saveCR.ll
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2010-03-09-indirect-call.ll
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2010-04-01-MachineCSEBug.ll
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2010-05-03-retaddr1.ll
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2010-10-11-Fast-Varargs.ll
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2010-12-18-PPCStackRefs.ll
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2011-12-05-NoSpillDupCR.ll
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2011-12-06-SpillAndRestoreCR.ll
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2011-12-08-DemandedBitsMiscompile.ll
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2012-09-16-TOC-entry-check.ll
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2012-10-11-dynalloc.ll
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2012-10-12-bitcast.ll
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2012-11-16-mischedcall.ll
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2013-05-15-preinc-fold.ll
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2013-07-01-PHIElimBug.ll
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a2-fp-basic.ll
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a2q-stackalign.ll
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a2q.ll
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aa-tbaa.ll
Add a TBAA CodeGen failure test case
2014-01-25 20:16:36 +00:00
addc.ll
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addi-reassoc.ll
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addrfuncstr.ll
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align.ll
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allocate-r0.ll
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altivec-ord.ll
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and_add.ll
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and_sext.ll
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and_sra.ll
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and-branch.ll
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and-elim.ll
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and-imm.ll
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anon_aggr.ll
One ppc32-darwin, a i64 inside a structure can have 32 bit alignment.
2013-12-18 14:35:37 +00:00
ashr-neg1.ll
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asm-dialect.ll
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asm-Zy.ll
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asym-regclass-copy.ll
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atomic-1.ll
IR: add a second ordering operand to cmpxhg for failure
2014-03-11 10:48:52 +00:00
atomic-2.ll
IR: add a second ordering operand to cmpxhg for failure
2014-03-11 10:48:52 +00:00
Atomics-32.ll
IR: add a second ordering operand to cmpxhg for failure
2014-03-11 10:48:52 +00:00
Atomics-64.ll
IR: add a second ordering operand to cmpxhg for failure
2014-03-11 10:48:52 +00:00
available-externally.ll
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bdzlr.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
big-endian-actual-args.ll
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big-endian-call-result.ll
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big-endian-formal-args.ll
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branch-opt.ll
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bswap-load-store.ll
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buildvec_canonicalize.ll
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bv-pres-v8i1.ll
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bv-widen-undef.ll
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byval-agg-info.ll
Fix pointer info on PPC byval stores
2014-01-21 20:15:58 +00:00
calls.ll
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can-lower-ret.ll
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cmp-cmp.ll
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coalesce-ext.ll
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compare-duplicate.ll
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compare-simm.ll
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complex-return.ll
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constants.ll
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copysignl.ll
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cr1eq-no-extra-moves.ll
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cr1eq.ll
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cr_spilling.ll
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cr-spills.ll
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crash.ll
Add a reduced testcase from the recent bootstrap crash.
2013-12-16 21:24:00 +00:00
crbit-asm.ll
Add a PPC inline asm constraint type for single CR bits
2014-03-02 18:23:39 +00:00
crbits.ll
Remove extra truncs/exts around i32 bit operations on PPC64
2014-03-01 21:36:57 +00:00
crsave.ll
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ctr-cleanup.ll
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ctrloop-asm.ll
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ctrloop-cpsgn.ll
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ctrloop-fp64.ll
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ctrloop-i64.ll
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ctrloop-large-ec.ll
Actually call FileCheck in tests
2014-02-16 13:27:39 +00:00
ctrloop-le.ll
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ctrloop-lt.ll
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ctrloop-ne.ll
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ctrloop-reg.ll
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ctrloop-s000.ll
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ctrloop-sums.ll
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ctrloop-udivti3.ll
Account for 128-bit integer operations in PPCCTRLoops
2014-02-25 20:51:50 +00:00
ctrloops.ll
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cttz.ll
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darwin-labels.ll
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dbg.ll
DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}
2014-02-04 01:23:52 +00:00
DbgValueOtherTargets.test
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dcbt-sched.ll
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delete-node.ll
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div-2.ll
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dyn-alloca-aligned.ll
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early-ret2.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
early-ret.ll
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empty-functions.ll
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emptystruct.ll
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eqv-andc-orc-nor.ll
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extsh.ll
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fabs.ll
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fast-isel-binary.ll
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fast-isel-br-const.ll
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fast-isel-call.ll
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fast-isel-cmp-imm.ll
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fast-isel-conversion-p5.ll
Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.
2014-03-18 14:32:50 +00:00
fast-isel-conversion.ll
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fast-isel-crash.ll
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fast-isel-ext.ll
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fast-isel-fold.ll
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fast-isel-GEP-coalesce.ll
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fast-isel-indirectbr.ll
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fast-isel-load-store.ll
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fast-isel-redefinition.ll
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fast-isel-ret.ll
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fast-isel-shifter.ll
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fastisel-gep-promote-before-add.ll
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fcpsgn.ll
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float-asmprint.ll
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float-to-int.ll
[PowerPC] Make use of VSX f64 <-> i64 conversion instructions
2014-03-23 05:35:00 +00:00
floatPSA.ll
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fma.ll
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fnabs.ll
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fneg.ll
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fold-li.ll
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fold-zero.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
fp_to_uint.ll
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fp-branch.ll
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fp-int-fp.ll
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fpcopy.ll
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frame-size.ll
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frameaddr.ll
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Frames-alloca.ll
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Frames-large.ll
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Frames-leaf.ll
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Frames-small.ll
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frounds.ll
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fsel.ll
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fsl-e500mc.ll
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fsl-e5500.ll
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fsqrt.ll
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glob-comp-aa-crash.ll
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hello-reloc.s
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hello.ll
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hidden-vis-2.ll
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hidden-vis.ll
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i1-to-double.ll
With PPC CR bit registers, handle int_to_fp on older cores
2014-03-05 22:14:00 +00:00
i32-to-float.ll
[PowerPC] Make use of VSX f64 <-> i64 conversion instructions
2014-03-23 05:35:00 +00:00
i64_fp_round.ll
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i64_fp.ll
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i64-to-float.ll
[PowerPC] Make use of VSX f64 <-> i64 conversion instructions
2014-03-23 05:35:00 +00:00
i128-and-beyond.ll
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iabs.ll
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ifcvt.ll
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illegal-element-type.ll
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in-asm-f64-reg.ll
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indirectbr.ll
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inlineasm-copy.ll
"foo" is not a ppc instruction, don't try to parse it.
2014-02-13 15:33:35 +00:00
inlineasm-i64-reg.ll
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int-fp-conv-0.ll
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int-fp-conv-1.ll
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inverted-bool-compares.ll
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isel-rc-nox0.ll
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isel.ll
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ispositive.ll
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itofp128.ll
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jaggedstructs.ll
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LargeAbsoluteAddr.ll
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lbzux.ll
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lha.ll
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lit.local.cfg
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load-constant-addr.ll
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load-shift-combine.ll
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long-compare.ll
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longdbl-truncate.ll
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lsa.ll
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lsr-postinc-pos.ll
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mask64.ll
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mature-mc-support.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
mcm-1.ll
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mcm-2.ll
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mcm-3.ll
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mcm-4.ll
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mcm-5.ll
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mcm-6.ll
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mcm-7.ll
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mcm-8.ll
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mcm-9.ll
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mcm-10.ll
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mcm-11.ll
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mcm-12.ll
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mcm-default.ll
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mcm-obj-2.ll
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mcm-obj.ll
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mem_update.ll
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mem-rr-addr-mode.ll
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misched-inorder-latency.ll
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misched.ll
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mul-neg-power-2.ll
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mul-with-overflow.ll
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mulhs.ll
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mulli64.ll
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mult-alt-generic-powerpc64.ll
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mult-alt-generic-powerpc.ll
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neg.ll
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negctr.ll
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no-dead-strip.ll
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novrsave.ll
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optcmp.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
or-addressing-mode.ll
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popcnt.ll
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ppc32-i1-vaarg.ll
Fixup PPC Darwin i1 argument handling
2014-03-06 00:45:19 +00:00
ppc32-vacopy.ll
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ppc64-32bit-addic.ll
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ppc64-abi-extend.ll
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ppc64-align-long-double.ll
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ppc64-calls.ll
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ppc64-crash.ll
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ppc64-cyclecounter.ll
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ppc64-linux-func-size.ll
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ppc64-prefetch.ll
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ppc64-toc.ll
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ppc64-vaarg-int.ll
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ppc64-zext.ll
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ppc440-fp-basic.ll
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ppc440-msync.ll
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ppc-prologue.ll
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ppc-vaarg-agg.ll
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ppcf128-1-opt.ll
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ppcf128-1.ll
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ppcf128-2.ll
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ppcf128-3.ll
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ppcf128-4.ll
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pr3711_widen_bit.ll
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pr12757.ll
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pr13641.ll
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pr13891.ll
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pr15031.ll
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pr15359.ll
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pr15630.ll
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pr15632.ll
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pr16556-2.ll
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pr16556.ll
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pr16573.ll
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pr17168.ll
DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}
2014-02-04 01:23:52 +00:00
pr17354.ll
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private.ll
Add back r201608, r201622, r201624 and r201625
2014-02-19 17:23:20 +00:00
pwr3-6x.ll
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pwr7-gt-nop.ll
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quadint-return.ll
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r31.ll
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recipest.ll
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reg-coalesce-simple.ll
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reg-names.ll
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reloc-align.ll
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remap-crash.ll
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remat-imm.ll
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retaddr.ll
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return-val-i128.ll
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rlwimi2.ll
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rlwimi3.ll
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rlwimi-and.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
rlwimi-commute.ll
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rlwimi-keep-rsh.ll
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rlwimi.ll
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rlwinm2.ll
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rlwinm.ll
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rotl-2.ll
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rotl-64.ll
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rotl.ll
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rounding-ops.ll
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rs-undef-use.ll
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s000-alias-misched.ll
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sdag-ppcf128.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
sections.ll
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select_lt0.ll
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select-cc.ll
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set0-v8i16.ll
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setcc_no_zext.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
seteq-0.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
shift128.ll
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shl_elim.ll
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shl_sext.ll
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sign_ext_inreg1.ll
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sj-ctr-loop.ll
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sjlj.ll
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small-arguments.ll
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spill-nor0.ll
Handle spilling the PPC GPRC_NOR0 register class
2014-01-28 05:32:58 +00:00
srl-mask.ll
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stack-protector.ll
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stack-realign.ll
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std-unal-fi.ll
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stdux-constuse.ll
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stfiwx-2.ll
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stfiwx.ll
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store-load-fwd.ll
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store-update.ll
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structsinmem.ll
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structsinregs.ll
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stubs.ll
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stwu8.ll
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stwu-gta.ll
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stwux.ll
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sub-bv-types.ll
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subc.ll
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subsumes-pred-regs.ll
Add CR-bit tracking to the PowerPC backend for i1 values
2014-02-28 00:27:01 +00:00
svr4-redzone.ll
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tailcall1-64.ll
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tailcall1.ll
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tailcallpic1.ll
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tls-pic.ll
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tls.ll
Implement initial-exec TLS for PPC32.
2013-12-20 18:08:54 +00:00
trampoline.ll
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unal4-std.ll
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unal-altivec2.ll
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unal-altivec.ll
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unaligned.ll
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unsafe-math.ll
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unwind-dw2-g.ll
DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}
2014-02-04 01:23:52 +00:00
unwind-dw2.ll
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vaddsplat.ll
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varargs-struct-float.ll
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varargs.ll
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vcmp-fold.ll
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vec_auto_constant.ll
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vec_br_cmp.ll
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vec_buildvector_loadstore.ll
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vec_call.ll
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vec_cmp.ll
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vec_constants.ll
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vec_conv.ll
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vec_extload.ll
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vec_fmuladd.ll
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vec_fneg.ll
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vec_insert.ll
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vec_misaligned.ll
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vec_mul.ll
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vec_perf_shuffle.ll
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vec_rounding.ll
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vec_select.ll
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vec_shift.ll
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vec_shuffle.ll
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vec_splat_constant.ll
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vec_splat.ll
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vec_sqrt.ll
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vec_vrsave.ll
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vec_zero.ll
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vec-abi-align.ll
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vector-identity-shuffle.ll
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vector.ll
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vrsave-spill.ll
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vrspill.ll
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vsx-fma-m.ll
[PowerPC] Select between VSX A-type and M-type FMA instructions just before RA
2014-03-25 23:29:21 +00:00
vsx.ll
[PowerPC] Lower VSELECT using xxsel when VSX is available
2014-03-26 12:49:28 +00:00
vtable-reloc.ll
[ppc64] Avoid copy relocs in named rodata sections
2014-03-14 12:45:22 +00:00
weak_def_can_be_hidden.ll
Fix a bug with .weak_def_can_be_hidden: Mutable variables cannot use it.
2014-02-07 16:21:30 +00:00
zero-not-run.ll
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