llvm-6502/test/MC/ARM/neon-bitcount-encoding.s
Owen Anderson 95b9766fea Use ARM-style comment syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:33:37 +00:00

33 lines
1.3 KiB
ArmAsm

@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
@ XFAIL: *
@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3]
vcnt.8 d16, d16
@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xf3]
vcnt.8 q8, q8
@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xf3]
vclz.i8 d16, d16
@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xf3]
vclz.i16 d16, d16
@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xf3]
vclz.i32 d16, d16
@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xf3]
vclz.i8 q8, q8
@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xf3]
vclz.i16 q8, q8
@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xf3]
vclz.i32 q8, q8
@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xf3]
vcls.s8 d16, d16
@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xf3]
vcls.s16 d16, d16
@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xf3]
vcls.s32 d16, d16
@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xf3]
vcls.s8 q8, q8
@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xf3]
vcls.s16 q8, q8
@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xf3]
vcls.s32 q8, q8