llvm-6502/test/CodeGen/X86/TruncAssertZext.ll
Michael Kuperstein f2fe3b72a9 [X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext
This fixes an issue with matching trunc -> assertsext -> zext on x86-64, which would not zero the high 32-bits. See PR20494 for details.
Recommitting - This time, with a hopefully working test.

Differential Revision: http://reviews.llvm.org/D6128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221672 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 07:07:40 +00:00

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LLVM

; RUN: llc < %s -O2 -march=x86-64 | FileCheck %s
; Checks that a zeroing mov is inserted for the trunc/zext pair even when
; the source of the zext is an AssertSext node
; PR20494
define i64 @main(i64 %a) {
; CHECK-LABEL: main
; CHECK: movl %e{{..}}, %eax
; CHECK: ret
%or = or i64 %a, -2
%trunc = trunc i64 %or to i32
br label %l
l:
%ext = zext i32 %trunc to i64
ret i64 %ext
}