llvm-6502/lib/Target
Chris Lattner ccc8ed7bb5 Add a forward def
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23621 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-04 05:09:20 +00:00
..
Alpha Sort the cpu and features table, so that the alpha backend doesn't fail EVERY 2005-10-02 07:13:52 +00:00
CBackend fix CBackend/2005-09-27-VolatileFuncPtr.ll 2005-09-27 20:52:44 +00:00
IA64 these registers don't belong to any register classes, so don't mark them 2005-09-30 06:42:24 +00:00
PowerPC Speed up the asm printer a lot by not printing formatted LLVM asm output 2005-10-03 07:08:36 +00:00
Skeleton CR registers are not used by this "target" 2005-09-30 06:43:58 +00:00
Sparc Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcV8 Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcV9 silence a warning 2005-10-02 16:27:59 +00:00
X86 silence some warnings 2005-10-02 16:29:36 +00:00
Makefile
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Print: 2005-09-07 05:44:14 +00:00
Target.td Add a forward def 2005-10-04 05:09:20 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp Remove the X86 and PowerPC Simple instruction selectors; their time has 2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSubtarget.cpp