mirror of
https://github.com/c64scene-ar/llvm-6502.git
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184f8f7c10
TableGen had been nicely generating code to print a number of instructions using shorter aliases (and PowerPC has plenty of short mnemonics), but we were not calling it. For some of the aliases we support in the parser, TableGen can't infer the "inverse" alias relationship, so there is still more to do. Thus, after some hours of updating test cases... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235616 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.3 KiB
LLVM
51 lines
1.3 KiB
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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target datalayout = "E-m:e-p:32:32-i64:64-n32"
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target triple = "powerpc-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define zeroext i16 @test16(i16 zeroext %x, i16 zeroext %y) #0 {
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entry:
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%0 = xor i16 %y, %x
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%1 = and i16 %0, 255
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%cmp = icmp eq i16 %1, 0
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%cmp20 = icmp ult i16 %0, 256
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%conv25 = select i1 %cmp, i32 255, i32 0
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%conv27 = select i1 %cmp20, i32 65280, i32 0
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%or = or i32 %conv25, %conv27
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%conv29 = trunc i32 %or to i16
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ret i16 %conv29
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; CHECK-LABEL: @test16
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; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
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; CHECK: clrlwi 3, [[REG1]], 16
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; CHECK: blr
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}
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define i32 @test32(i32 %x, i32 %y) #0 {
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entry:
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%0 = xor i32 %y, %x
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%1 = and i32 %0, 255
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%cmp = icmp eq i32 %1, 0
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%2 = and i32 %0, 65280
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%cmp28 = icmp eq i32 %2, 0
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%3 = and i32 %0, 16711680
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%cmp34 = icmp eq i32 %3, 0
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%cmp40 = icmp ult i32 %0, 16777216
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%conv44 = select i1 %cmp, i32 255, i32 0
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%conv45 = select i1 %cmp28, i32 65280, i32 0
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%conv47 = select i1 %cmp34, i32 16711680, i32 0
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%conv50 = select i1 %cmp40, i32 -16777216, i32 0
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%or = or i32 %conv45, %conv50
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%or49 = or i32 %or, %conv44
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%or52 = or i32 %or49, %conv47
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ret i32 %or52
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; CHECK-LABEL: @test32
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; CHECK: cmpb 3, 4, 3
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; CHECK-NOT: rlwinm
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; CHECK: blr
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}
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attributes #0 = { nounwind readnone }
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