Tom Stellard 953c681473 R600 -> AMDGPU rename ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-13 03:28:10 +00:00
..
AArch64	AArch64: map bare-metal arm64-macho triple to MachO MC layer.	2015-06-12 23:37:11 +00:00
AMDGPU	R600 -> AMDGPU rename	2015-06-13 03:28:10 +00:00
ARM	[ARM] Disabling vfp4 should disable fp16	2015-06-12 09:38:51 +00:00
BPF	[bpf] rename triple names bpf_be -> bpfeb	2015-06-05 16:11:14 +00:00
CPP
Generic
Hexagon	[Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing intrinsic parameters to appropriate width.	2015-06-12 19:57:32 +00:00
Inputs
Mips	[mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.	2015-06-02 20:32:50 +00:00
MIR
MSP430
NVPTX	[NVPTX] fix a crash bug in NVPTXFavorNonGenericAddrSpaces	2015-06-09 21:50:32 +00:00
PowerPC	LLVM support for vector quad bit permute and gather instructions through builtins	2015-06-11 06:21:25 +00:00
SPARC
SystemZ
Thumb	Revert r238473, "Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM."	2015-06-05 18:01:28 +00:00
Thumb2	ARM: Thumb2 LDRD/STRD supports independent input/output regs	2015-06-03 16:30:24 +00:00
WinEH
X86	[WinEH] Put finally pointers in the handler scope table field	2015-06-11 23:37:18 +00:00
XCore