mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7a34599db0
In the commit message to r185476 I wrote: >The PowerPC-specific modifiers VK_PPC_TLSGD and VK_PPC_TLSLD >correspond exactly to the generic modifiers VK_TLSGD and VK_TLSLD. >This causes some confusion with the asm parser, since VK_PPC_TLSGD >is output as @tlsgd, which is then read back in as VK_TLSGD. > >To avoid this confusion, this patch removes the PowerPC-specific >modifiers and uses the generic modifiers throughout. (The only >drawback is that the generic modifiers are printed in upper case >while the usual convention on PowerPC is to use lower-case modifiers. >But this is just a cosmetic issue.) This was unfortunately incorrect, there is is fact another, serious drawback to using the default VK_TLSLD/VK_TLSGD variant kinds: using these causes ELFObjectWriter::RelocNeedsGOT to return true, which in turn causes the ELFObjectWriter to emit an undefined reference to _GLOBAL_OFFSET_TABLE_. This is a problem on powerpc64, because it uses the TOC instead of the GOT, and the linker does not provide _GLOBAL_OFFSET_TABLE_, so the symbol remains undefined. This means shared libraries using TLS built with the integrated assembler are currently broken. While the whole RelocNeedsGOT / _GLOBAL_OFFSET_TABLE_ situation probably ought to be properly fixed at some point, for now I'm simply reverting the r185476 commit. Now this in turn exposes the breakage of handling @tlsgd/@tlsld in the asm parser that this check-in was originally intended to fix. To avoid this regression, I'm also adding a different fix for this problem: while common code now parses @tlsgd as VK_TLSGD, a special hack in the asm parser translates this code to the platform-specific VK_PPC_TLSGD that the back-end now expects. While this is not really pretty, it's self-contained and shouldn't hurt anything else for now. One the underlying problem is fixed, this hack can be reverted again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185945 91177308-0d34-0410-b5e6-96231b3b80d8
445 lines
26 KiB
ArmAsm
445 lines
26 KiB
ArmAsm
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# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
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# RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
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# RUN: llvm-readobj -r | FileCheck %s -check-prefix=REL
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# CHECK: b target # encoding: [0b010010AA,A,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0
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b target
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# CHECK: ba target # encoding: [0b010010AA,A,A,0bAAAAAA10]
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# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0
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ba target
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# CHECK: beq 0, target # encoding: [0x41,0x82,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0
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beq target
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# CHECK: beqa 0, target # encoding: [0x41,0x82,A,0bAAAAAA10]
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# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0
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beqa target
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# CHECK: li 3, target@l # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
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li 3, target@l
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# CHECK: addis 3, 3, target@ha # encoding: [0x3c,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
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addis 3, 3, target@ha
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# CHECK: lis 3, target@ha # encoding: [0x3c,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
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lis 3, target@ha
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# CHECK: addi 4, 3, target@l # encoding: [0x38,0x83,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
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addi 4, 3, target@l
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# CHECK: li 3, target@ha # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
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li 3, target@ha
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# CHECK: lis 3, target@l # encoding: [0x3c,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
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lis 3, target@l
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# CHECK: li 3, target@h # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
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li 3, target@h
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# CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
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lis 3, target@h
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# CHECK: li 3, target@higher # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0
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li 3, target@higher
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# CHECK: lis 3, target@highest # encoding: [0x3c,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0
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lis 3, target@highest
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# CHECK: li 3, target@highera # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0
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li 3, target@highera
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# CHECK: lis 3, target@highesta # encoding: [0x3c,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0
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lis 3, target@highesta
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# CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
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lwz 1, target@l(3)
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# CHECK: lwz 1, target(3) # encoding: [0x80,0x23,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
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lwz 1, target(3)
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# CHECK: ld 1, target@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0
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ld 1, target@l(3)
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# CHECK: ld 1, target(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_DS target 0x0
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ld 1, target(3)
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base:
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# CHECK: lwz 1, target-base(3) # encoding: [0x80,0x23,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target-base, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16 target 0x2
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lwz 1, target-base(3)
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# CHECK: li 3, target-base@h # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target-base@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HI target 0x6
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li 3, target-base@h
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# CHECK: li 3, target-base@l # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target-base@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_LO target 0xA
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li 3, target-base@l
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# CHECK: li 3, target-base@ha # encoding: [0x38,0x60,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target-base@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HA target 0xE
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li 3, target-base@ha
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# CHECK: ori 3, 3, target@l # encoding: [0x60,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
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ori 3, 3, target@l
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# CHECK: oris 3, 3, target@h # encoding: [0x64,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
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oris 3, 3, target@h
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# CHECK: ld 1, target@toc(2) # encoding: [0xe8,0x22,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@toc, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0
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ld 1, target@toc(2)
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# CHECK: addis 3, 2, target@toc@ha # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0
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addis 3, 2, target@toc@ha
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# CHECK: addi 4, 3, target@toc@l # encoding: [0x38,0x83,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
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addi 4, 3, target@toc@l
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# CHECK: addis 3, 2, target@toc@h # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0
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addis 3, 2, target@toc@h
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# CHECK: lwz 1, target@toc@l(3) # encoding: [0x80,0x23,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
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lwz 1, target@toc@l(3)
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# CHECK: ld 1, target@toc@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0
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ld 1, target@toc@l(3)
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# CHECK: addi 4, 3, target@GOT # encoding: [0x38,0x83,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
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addi 4, 3, target@got
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# CHECK: ld 1, target@GOT(2) # encoding: [0xe8,0x22,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
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ld 1, target@got(2)
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# CHECK: addis 3, 2, target@got@ha # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
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addis 3, 2, target@got@ha
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# CHECK: addi 4, 3, target@got@l # encoding: [0x38,0x83,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
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addi 4, 3, target@got@l
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# CHECK: addis 3, 2, target@got@h # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
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addis 3, 2, target@got@h
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# CHECK: lwz 1, target@got@l(3) # encoding: [0x80,0x23,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
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lwz 1, target@got@l(3)
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# CHECK: ld 1, target@got@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
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ld 1, target@got@l(3)
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# CHECK: addis 3, 2, target@tprel@ha # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0
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addis 3, 2, target@tprel@ha
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# CHECK: addi 3, 3, target@tprel@l # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0
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addi 3, 3, target@tprel@l
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# CHECK: addi 3, 3, target@tprel # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16 target 0x0
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addi 3, 3, target@tprel
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# CHECK: addi 3, 3, target@tprel@h # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@h, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HI target 0x0
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addi 3, 3, target@tprel@h
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# CHECK: addi 3, 3, target@tprel@higher # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@higher, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHER target 0x0
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addi 3, 3, target@tprel@higher
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# CHECK: addis 3, 2, target@tprel@highest # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highest, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHEST target 0x0
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addis 3, 2, target@tprel@highest
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# CHECK: addi 3, 3, target@tprel@highera # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highera, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHERA target 0x0
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addi 3, 3, target@tprel@highera
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# CHECK: addis 3, 2, target@tprel@highesta # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highesta, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHESTA target 0x0
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addis 3, 2, target@tprel@highesta
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# CHECK: ld 1, target@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO_DS target 0x0
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ld 1, target@tprel@l(3)
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# CHECK: ld 1, target@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16ds
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_DS target 0x0
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ld 1, target@tprel(3)
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# CHECK: addis 3, 2, target@dtprel@ha # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0
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addis 3, 2, target@dtprel@ha
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# CHECK: addi 3, 3, target@dtprel@l # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0
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addi 3, 3, target@dtprel@l
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# CHECK: addi 3, 3, target@dtprel # encoding: [0x38,0x63,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16 target 0x0
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|
addi 3, 3, target@dtprel
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|
|
|
# CHECK: addi 3, 3, target@dtprel@h # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@h, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HI target 0x0
|
|
addi 3, 3, target@dtprel@h
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|
|
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# CHECK: addi 3, 3, target@dtprel@higher # encoding: [0x38,0x63,A,A]
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|
# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@higher, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHER target 0x0
|
|
addi 3, 3, target@dtprel@higher
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|
|
|
# CHECK: addis 3, 2, target@dtprel@highest # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highest, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHEST target 0x0
|
|
addis 3, 2, target@dtprel@highest
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|
|
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# CHECK: addi 3, 3, target@dtprel@highera # encoding: [0x38,0x63,A,A]
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|
# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highera, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHERA target 0x0
|
|
addi 3, 3, target@dtprel@highera
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|
|
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# CHECK: addis 3, 2, target@dtprel@highesta # encoding: [0x3c,0x62,A,A]
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|
# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highesta, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHESTA target 0x0
|
|
addis 3, 2, target@dtprel@highesta
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|
|
|
# CHECK: ld 1, target@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16ds
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO_DS target 0x0
|
|
ld 1, target@dtprel@l(3)
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|
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# CHECK: ld 1, target@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16ds
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_DS target 0x0
|
|
ld 1, target@dtprel(3)
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|
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# CHECK: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A]
|
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# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0
|
|
addis 3, 2, target@got@tprel@ha
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|
|
|
# CHECK: ld 1, target@got@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16ds
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
|
|
ld 1, target@got@tprel@l(3)
|
|
|
|
# CHECK: addis 3, 2, target@got@tprel@h # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@h, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0
|
|
addis 3, 2, target@got@tprel@h
|
|
|
|
# CHECK: addis 3, 2, target@got@tprel@l # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
|
|
addis 3, 2, target@got@tprel@l
|
|
|
|
# CHECK: addis 3, 2, target@got@tprel # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
|
|
addis 3, 2, target@got@tprel
|
|
|
|
# CHECK: ld 1, target@got@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16ds
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
|
|
ld 1, target@got@tprel(3)
|
|
|
|
# CHECK: addis 3, 2, target@got@dtprel@ha # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@ha, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HA target 0x0
|
|
addis 3, 2, target@got@dtprel@ha
|
|
|
|
# CHECK: ld 1, target@got@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16ds
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
|
|
ld 1, target@got@dtprel@l(3)
|
|
|
|
# CHECK: addis 3, 2, target@got@dtprel@h # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@h, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0
|
|
addis 3, 2, target@got@dtprel@h
|
|
|
|
# CHECK: addis 3, 2, target@got@dtprel@l # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
|
|
addis 3, 2, target@got@dtprel@l
|
|
|
|
# CHECK: addis 3, 2, target@got@dtprel # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
|
|
addis 3, 2, target@got@dtprel
|
|
|
|
# CHECK: ld 1, target@got@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16ds
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
|
|
ld 1, target@got@dtprel(3)
|
|
|
|
# CHECK: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0
|
|
addis 3, 2, target@got@tlsgd@ha
|
|
|
|
# CHECK: addi 3, 3, target@got@tlsgd@l # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0
|
|
addi 3, 3, target@got@tlsgd@l
|
|
|
|
# CHECK: addi 3, 3, target@got@tlsgd@h # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@h, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HI target 0x0
|
|
addi 3, 3, target@got@tlsgd@h
|
|
|
|
# CHECK: addi 3, 3, target@got@tlsgd # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16 target 0x0
|
|
addi 3, 3, target@got@tlsgd
|
|
|
|
|
|
# CHECK: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0
|
|
addis 3, 2, target@got@tlsld@ha
|
|
|
|
# CHECK: addi 3, 3, target@got@tlsld@l # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0
|
|
addi 3, 3, target@got@tlsld@l
|
|
|
|
# CHECK: addi 3, 3, target@got@tlsld@h # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@h, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HI target 0x0
|
|
addi 3, 3, target@got@tlsld@h
|
|
|
|
# CHECK: addi 3, 3, target@got@tlsld # encoding: [0x38,0x63,A,A]
|
|
# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld, kind: fixup_ppc_half16
|
|
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
|
|
addi 3, 3, target@got@tlsld
|
|
|
|
# CHECK: bl __tls_get_addr(target@tlsgd) # encoding: [0b010010BB,B,B,0bBBBBBB01]
|
|
# CHECK-NEXT: # fixup A - offset: 0, value: target@tlsgd, kind: fixup_ppc_nofixup
|
|
# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
|
|
# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0
|
|
# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
|
|
bl __tls_get_addr(target@tlsgd)
|
|
|
|
# CHECK: bl __tls_get_addr(target@tlsld) # encoding: [0b010010BB,B,B,0bBBBBBB01]
|
|
# CHECK-NEXT: # fixup A - offset: 0, value: target@tlsld, kind: fixup_ppc_nofixup
|
|
# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
|
|
# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0
|
|
# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
|
|
bl __tls_get_addr(target@tlsld)
|
|
|
|
# CHECK: add 3, 4, target@tls # encoding: [0x7c,0x64,0x6a,0x14]
|
|
# CHECK-NEXT: # fixup A - offset: 0, value: target@tls, kind: fixup_ppc_nofixup
|
|
# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLS target 0x0
|
|
add 3, 4, target@tls
|
|
|
|
|
|
# Data relocs
|
|
# llvm-mc does not show any "encoding" string for data, so we just check the relocs
|
|
|
|
# CHECK-REL: .rela.data
|
|
.data
|
|
|
|
# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TOC - 0x0
|
|
.quad .TOC.@tocbase
|
|
|
|
# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPMOD64 target 0x0
|
|
.quad target@dtpmod
|
|
|
|
# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TPREL64 target 0x0
|
|
.quad target@tprel
|
|
|
|
# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPREL64 target 0x0
|
|
.quad target@dtprel
|
|
|