llvm-6502/lib/Target/R600
2014-06-01 07:38:21 +00:00
..
InstPrinter R600/SI: Prettier display of input modifiers 2014-05-10 19:18:33 +00:00
MCTargetDesc
TargetInfo
AMDGPU.h R600: Add definition for flat address space ID. 2014-05-22 18:27:07 +00:00
AMDGPU.td R600/SI: Add a PredicateControl class for managing TableGen predicates 2014-05-16 20:56:45 +00:00
AMDGPUAsmPrinter.cpp
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td R600/SI: allow 5 more input SGPRs to a shader 2014-05-05 19:30:54 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp R600/SI: Refactor the VOP3_32 tablegen class 2014-05-16 20:56:47 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td R600: Add intrinsics for mad24 2014-05-22 18:00:15 +00:00
AMDGPUInstructions.td R600/SI: Fix [s|u]int_to_fp for i1 2014-05-31 06:47:42 +00:00
AMDGPUIntrinsics.td R600: Add intrinsics for mad24 2014-05-22 18:00:15 +00:00
AMDGPUISelDAGToDAG.cpp R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0 2014-05-15 14:41:54 +00:00
AMDGPUISelLowering.cpp R600: Set all float vector expands in the same place 2014-06-01 07:38:21 +00:00
AMDGPUISelLowering.h R600: Implement ComputeNumSignBitsForTargetNode for BFE 2014-05-22 18:09:03 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp Resolving MSVC warnings about switch statements with a default label, but no case labels. No functional changes intended. 2014-05-19 14:29:04 +00:00
AMDGPUMCInstLower.h R600/SI: Refactor the VOP3_32 tablegen class 2014-05-16 20:56:47 +00:00
AMDGPURegisterInfo.cpp Use range for 2014-05-15 21:44:05 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600: Remove unused function AMDGPUSubtarget::getDefaultSize() 2014-04-30 14:20:53 +00:00
AMDGPUSubtarget.h R600: Remove unused function AMDGPUSubtarget::getDefaultSize() 2014-04-30 14:20:53 +00:00
AMDGPUTargetMachine.cpp R600: Add definition for flat address space ID. 2014-05-22 18:27:07 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td R600: Add mul24 intrinsics 2014-05-12 17:49:57 +00:00
AMDILISelLowering.cpp Use range for 2014-05-15 21:44:05 +00:00
AMDILRegisterInfo.td
CaymanInstructions.td R600: Expand mul24 for GPUs without it 2014-05-22 18:00:24 +00:00
CMakeLists.txt R600/SI: Use VALU instructions for copying i1 values 2014-04-30 15:31:33 +00:00
EvergreenInstructions.td R600: Expand mul24 for GPUs without it 2014-05-22 18:00:24 +00:00
LLVMBuild.txt
Makefile
Processors.td R600/SI: Add processor type for Mullins. 2014-05-02 15:41:49 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td R600: Expand mul24 for GPUs without it 2014-05-22 18:00:24 +00:00
R600Intrinsics.td
R600ISelLowering.cpp R600: Add dag combine for BFE 2014-05-22 18:09:07 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies 2014-05-15 14:41:55 +00:00
SIInsertWaits.cpp
SIInstrFormats.td R600/SI: Add a PredicateControl class for managing TableGen predicates 2014-05-16 20:56:45 +00:00
SIInstrInfo.cpp R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies 2014-05-15 14:41:55 +00:00
SIInstrInfo.h R600/SI: Refactor the VOP3_32 tablegen class 2014-05-16 20:56:47 +00:00
SIInstrInfo.td R600/SI: Refactor the VOP3_32 tablegen class 2014-05-16 20:56:47 +00:00
SIInstructions.td R600/SI: Remove redundant patterns 2014-05-31 19:25:17 +00:00
SIIntrinsics.td
SIISelLowering.cpp R600: Add dag combine for BFE 2014-05-22 18:09:07 +00:00
SIISelLowering.h
SILowerControlFlow.cpp R600/SI: Use VALU instructions for copying i1 values 2014-04-30 15:31:33 +00:00
SILowerI1Copies.cpp R600/SI: Use VALU instructions for i1 ops 2014-05-15 14:41:50 +00:00
SIMachineFunctionInfo.cpp R600/SI: Only create one instruction when spilling/restoring register v3 2014-05-02 15:41:42 +00:00
SIMachineFunctionInfo.h R600/SI: Only create one instruction when spilling/restoring register v3 2014-05-02 15:41:42 +00:00
SIRegisterInfo.cpp Use range for 2014-05-12 19:23:21 +00:00
SIRegisterInfo.h R600/SI: Only create one instruction when spilling/restoring register v3 2014-05-02 15:41:42 +00:00
SIRegisterInfo.td R600/SI: Use VALU instructions for copying i1 values 2014-04-30 15:31:33 +00:00
SISchedule.td
SITypeRewriter.cpp