llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-05 07:56:14 +00:00

History

Douglas Gregor 1555a23335 Introduce new headers whose inclusion forces linking and initialization of all targets (InitializeAllTargets.h) or assembler printers (InitializeAllAsmPrinters.h). This is a step toward the elimination of relinked object files, so that we can build normal archives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8		2009-06-16 20:12:29 +00:00
..
AsmPrinter	Introduce new headers whose inclusion forces linking and	2009-06-16 20:12:29 +00:00
Alpha.h
Alpha.td
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Convert Alpha and Mips to use a MachineFunctionInfo subclass to	2009-06-03 20:30:14 +00:00
AlphaInstrInfo.h	Convert Alpha and Mips to use a MachineFunctionInfo subclass to	2009-06-03 20:30:14 +00:00
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp	Convert Alpha and Mips to use a MachineFunctionInfo subclass to	2009-06-03 20:30:14 +00:00
AlphaISelLowering.cpp	Fix old-style type names in comments.	2009-06-14 23:30:43 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h	Add explicit keywords.	2009-06-05 23:05:51 +00:00
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp	Introduce new headers whose inclusion forces linking and	2009-06-16 20:12:29 +00:00
AlphaTargetMachine.h
CMakeLists.txt
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html