Daniel Sanders 959f0c3f44 [mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT. ... Mask == ~InvMask asserts if the width of Mask and InvMask differ. The combine isn't valid (with two exceptions, see below) if the widths differ so test for this before testing Mask == ~InvMask. In the specific cases of Mask=~0 and InvMask=0, as well as Mask=0 and InvMask=~0, the combine is still valid. However, there are more appropriate combines that could be used in these cases such as folding x & 0 to 0, or x & ~0 to x. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195364 91177308-0d34-0410-b5e6-96231b3b80d8		2013-11-21 16:11:31 +00:00
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AArch64	Implemented Neon scalar vdup_lane intrinsics.	2013-11-21 08:16:15 +00:00
ARM	[PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV.	2013-11-18 13:50:19 +00:00
CPP
Generic	Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions."	2013-11-21 10:55:15 +00:00
Hexagon
Inputs
Mips	[mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT.	2013-11-21 16:11:31 +00:00
MSP430
NVPTX	[NVPTX] Fix handling of indirect calls	2013-11-15 12:30:04 +00:00
PowerPC	PPC popcnt[dw] do not have record forms	2013-11-20 20:54:55 +00:00
R600	R600/SI: Fix moveToVALU when the first operand is VSrc.	2013-11-18 20:09:55 +00:00
SPARC
SystemZ
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Thumb2	Enable generating legacy IT block for AArch32	2013-11-13 18:29:49 +00:00
X86	The basic problem is that some mainstream programs cannot deal with the way	2013-11-21 07:04:30 +00:00
XCore	Error if we see an alias to a declaration.	2013-11-14 13:58:06 +00:00