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https://github.com/c64scene-ar/llvm-6502.git
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f09378397e
per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
116 lines
3.3 KiB
C++
116 lines
3.3 KiB
C++
//===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an MSP430 MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430InstPrinter.h"
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#include "MSP430.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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// Include the auto-generated portion of the assembly writer.
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#include "MSP430GenAsmWriter.inc"
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void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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StringRef Annot, const MCSubtargetInfo &STI) {
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printInstruction(MI, O);
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printAnnotation(O, Annot);
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}
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void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isImm())
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O << Op.getImm();
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else {
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assert(Op.isExpr() && "unknown pcrel immediate operand");
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O << *Op.getExpr();
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}
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}
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void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O, const char *Modifier) {
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assert((Modifier == nullptr || Modifier[0] == 0) && "No modifiers supported");
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isReg()) {
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O << getRegisterName(Op.getReg());
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} else if (Op.isImm()) {
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O << '#' << Op.getImm();
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} else {
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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O << '#' << *Op.getExpr();
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}
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}
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void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O,
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const char *Modifier) {
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const MCOperand &Base = MI->getOperand(OpNo);
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const MCOperand &Disp = MI->getOperand(OpNo+1);
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// Print displacement first
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// If the global address expression is a part of displacement field with a
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// register base, we should not emit any prefix symbol here, e.g.
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// mov.w &foo, r1
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// vs
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// mov.w glb(r1), r2
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// Otherwise (!) msp430-as will silently miscompile the output :(
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if (!Base.getReg())
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O << '&';
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if (Disp.isExpr())
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O << *Disp.getExpr();
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else {
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assert(Disp.isImm() && "Expected immediate in displacement field");
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O << Disp.getImm();
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}
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// Print register base field
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if (Base.getReg())
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O << '(' << getRegisterName(Base.getReg()) << ')';
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}
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void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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unsigned CC = MI->getOperand(OpNo).getImm();
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switch (CC) {
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default:
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llvm_unreachable("Unsupported CC code");
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case MSP430CC::COND_E:
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O << "eq";
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break;
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case MSP430CC::COND_NE:
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O << "ne";
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break;
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case MSP430CC::COND_HS:
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O << "hs";
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break;
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case MSP430CC::COND_LO:
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O << "lo";
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break;
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case MSP430CC::COND_GE:
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O << "ge";
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break;
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case MSP430CC::COND_L:
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O << 'l';
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break;
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}
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}
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