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https://github.com/c64scene-ar/llvm-6502.git
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d4585b941a
When converting a signed 32-bit integer to double-precision floating point on hardware without a lfiwax instruction, we have to instead use a lfd followed by fcfid. We were erroneously offsetting the address by 4 bytes in preparation for either a lfiwax or lfiwzx when generating the lfd. This fixes that silly error. This was not caught in the test suite since the conversion tests were run with -mcpu=pwr7, which implies availability of lfiwax. I've added another test case for older hardware that checks the code we expect in the absence of lfiwax and other flavors of fcfid. There are fewer tests in this test case because we punt to DAG selection in more cases on older hardware. (We must generate complex fiddly sequences in those cases, and there is marginal benefit in duplicating that logic in fast-isel.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204155 91177308-0d34-0410-b5e6-96231b3b80d8
154 lines
3.5 KiB
LLVM
154 lines
3.5 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr5 | FileCheck %s --check-prefix=ELF64
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; Test sitofp
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define void @sitofp_double_i32(i32 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i32
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%b.addr = alloca double, align 8
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%conv = sitofp i32 %a to double
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; ELF64: std {{[0-9]+}}, -[[OFFSET:[0-9]+]](1)
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; ELF64: lfd {{[0-9]+}}, -[[OFFSET]](1)
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @sitofp_double_i64(i64 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i64
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%b.addr = alloca double, align 8
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%conv = sitofp i64 %a to double
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; ELF64: std {{[0-9]+}}, -[[OFFSET:[0-9]+]](1)
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; ELF64: lfd {{[0-9]+}}, -[[OFFSET]](1)
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @sitofp_double_i16(i16 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i16
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%b.addr = alloca double, align 8
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%conv = sitofp i16 %a to double
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; ELF64: extsh
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; ELF64: std {{[0-9]+}}, -[[OFFSET:[0-9]+]](1)
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; ELF64: lfd {{[0-9]+}}, -[[OFFSET]](1)
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @sitofp_double_i8(i8 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i8
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%b.addr = alloca double, align 8
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%conv = sitofp i8 %a to double
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; ELF64: extsb
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; ELF64: std {{[0-9]+}}, -[[OFFSET:[0-9]+]](1)
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; ELF64: lfd {{[0-9]+}}, -[[OFFSET]](1)
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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; Test fptosi
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define void @fptosi_float_i32(float %a) nounwind ssp {
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entry:
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; ELF64: fptosi_float_i32
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%b.addr = alloca i32, align 4
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%conv = fptosi float %a to i32
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; ELF64: fctiwz
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; ELF64: stfd
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; ELF64: lwa
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store i32 %conv, i32* %b.addr, align 4
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ret void
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}
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define void @fptosi_float_i64(float %a) nounwind ssp {
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entry:
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; ELF64: fptosi_float_i64
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%b.addr = alloca i64, align 4
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%conv = fptosi float %a to i64
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; ELF64: fctidz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 4
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ret void
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}
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define void @fptosi_double_i32(double %a) nounwind ssp {
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entry:
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; ELF64: fptosi_double_i32
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%b.addr = alloca i32, align 8
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%conv = fptosi double %a to i32
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; ELF64: fctiwz
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; ELF64: stfd
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; ELF64: lwa
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store i32 %conv, i32* %b.addr, align 8
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ret void
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}
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define void @fptosi_double_i64(double %a) nounwind ssp {
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entry:
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; ELF64: fptosi_double_i64
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%b.addr = alloca i64, align 8
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%conv = fptosi double %a to i64
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; ELF64: fctidz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 8
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ret void
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}
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; Test fptoui
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define void @fptoui_float_i32(float %a) nounwind ssp {
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entry:
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; ELF64: fptoui_float_i32
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%b.addr = alloca i32, align 4
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%conv = fptoui float %a to i32
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; ELF64: fctidz
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; ELF64: stfd
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; ELF64: lwz
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store i32 %conv, i32* %b.addr, align 4
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ret void
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}
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define void @fptoui_float_i64(float %a) nounwind ssp {
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entry:
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; ELF64: fptoui_float_i64
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%b.addr = alloca i64, align 4
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%conv = fptoui float %a to i64
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; ELF64: fctiduz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 4
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ret void
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}
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define void @fptoui_double_i32(double %a) nounwind ssp {
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entry:
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; ELF64: fptoui_double_i32
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%b.addr = alloca i32, align 8
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%conv = fptoui double %a to i32
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; ELF64: fctidz
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; ELF64: stfd
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; ELF64: lwz
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store i32 %conv, i32* %b.addr, align 8
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ret void
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}
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define void @fptoui_double_i64(double %a) nounwind ssp {
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entry:
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; ELF64: fptoui_double_i64
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%b.addr = alloca i64, align 8
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%conv = fptoui double %a to i64
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; ELF64: fctiduz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 8
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ret void
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}
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