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This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
179 lines
6.1 KiB
C++
179 lines
6.1 KiB
C++
//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the MSP430 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430.h"
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#include "MSP430InstrInfo.h"
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#include "MSP430MachineFunctionInfo.h"
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#include "MSP430TargetMachine.h"
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#include "MSP430GenInstrInfo.inc"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
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: TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)),
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RI(tm, *this), TM(tm) {}
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void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, bool isKill, int FrameIdx,
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const TargetRegisterClass *RC) const {
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (MI != MBB.end()) DL = MI->getDebugLoc();
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if (RC == &MSP430::GR16RegClass)
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BuildMI(MBB, MI, DL, get(MSP430::MOV16mr))
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.addFrameIndex(FrameIdx).addImm(0)
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.addReg(SrcReg, getKillRegState(isKill));
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else if (RC == &MSP430::GR8RegClass)
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BuildMI(MBB, MI, DL, get(MSP430::MOV8mr))
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.addFrameIndex(FrameIdx).addImm(0)
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.addReg(SrcReg, getKillRegState(isKill));
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else
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llvm_unreachable("Cannot store this register to stack slot!");
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}
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void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC) const{
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (MI != MBB.end()) DL = MI->getDebugLoc();
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if (RC == &MSP430::GR16RegClass)
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BuildMI(MBB, MI, DL, get(MSP430::MOV16rm))
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.addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
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else if (RC == &MSP430::GR8RegClass)
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BuildMI(MBB, MI, DL, get(MSP430::MOV8rm))
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.addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
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else
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llvm_unreachable("Cannot store this register to stack slot!");
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}
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bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const {
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (DestRC == SrcRC) {
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unsigned Opc;
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if (DestRC == &MSP430::GR16RegClass) {
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Opc = MSP430::MOV16rr;
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} else if (DestRC == &MSP430::GR8RegClass) {
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Opc = MSP430::MOV8rr;
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} else {
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return false;
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}
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BuildMI(MBB, I, DL, get(Opc), DestReg).addReg(SrcReg);
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return true;
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}
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return false;
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}
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bool
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MSP430InstrInfo::isMoveInstr(const MachineInstr& MI,
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unsigned &SrcReg, unsigned &DstReg,
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unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
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SrcSubIdx = DstSubIdx = 0; // No sub-registers yet.
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switch (MI.getOpcode()) {
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default:
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return false;
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case MSP430::MOV8rr:
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case MSP430::MOV16rr:
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assert(MI.getNumOperands() >= 2 &&
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MI.getOperand(0).isReg() &&
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MI.getOperand(1).isReg() &&
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"invalid register-register move instruction");
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SrcReg = MI.getOperand(1).getReg();
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DstReg = MI.getOperand(0).getReg();
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return true;
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}
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}
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bool
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MSP430InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI) const {
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if (CSI.empty())
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return false;
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (MI != MBB.end()) DL = MI->getDebugLoc();
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MachineFunction &MF = *MBB.getParent();
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MSP430MachineFunctionInfo *MFI = MF.getInfo<MSP430MachineFunctionInfo>();
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MFI->setCalleeSavedFrameSize(CSI.size() * 2);
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for (unsigned i = CSI.size(); i != 0; --i) {
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unsigned Reg = CSI[i-1].getReg();
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// Add the callee-saved register as live-in. It's killed at the spill.
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MBB.addLiveIn(Reg);
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BuildMI(MBB, MI, DL, get(MSP430::PUSH16r))
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.addReg(Reg, RegState::Kill);
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}
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return true;
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}
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bool
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MSP430InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI) const {
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if (CSI.empty())
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return false;
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (MI != MBB.end()) DL = MI->getDebugLoc();
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for (unsigned i = 0, e = CSI.size(); i != e; ++i)
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BuildMI(MBB, MI, DL, get(MSP430::POP16r), CSI[i].getReg());
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return true;
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}
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unsigned
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MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const SmallVectorImpl<MachineOperand> &Cond) const {
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// FIXME this should probably have a DebugLoc operand
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DebugLoc dl = DebugLoc::getUnknownLoc();
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// Shouldn't be a fall through.
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assert(TBB && "InsertBranch must not be told to insert a fallthrough");
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assert((Cond.size() == 1 || Cond.size() == 0) &&
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"MSP430 branch conditions have one component!");
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if (Cond.empty()) {
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// Unconditional branch?
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assert(!FBB && "Unconditional branch with multiple successors!");
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BuildMI(&MBB, dl, get(MSP430::JMP)).addMBB(TBB);
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return 1;
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}
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// Conditional branch.
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unsigned Count = 0;
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llvm_unreachable("Implement conditional branches!");
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return Count;
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}
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