David Majnemer 9637da6083 PPC: Allow partial fills in writeNopData() ... When asked to pad an irregular number of bytes, we should fill with zeros. This is consistent with the behavior specified in the AIX Assembler Language Reference as well as other LLVM and binutils assemblers. N.B. There is a small deviation from binutils' PPC assembler: when handling pads which are greater than 4 bytes but not mod 4, binutils will not emit any NOP sequences at all and only use zeros. This may or may not be a bug but there is no excellent rationale as to why that behavior is important to emulate. If that behavior is needed, we can change writeNopData() to behave in the same way. This fixes PR17352. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191426 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-26 09:18:48 +00:00
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AArch64	Initial support for Neon scalar instructions.	2013-09-24 02:47:27 +00:00
ARM	[ARMv8] Add support for the v8 cryptography extensions.	2013-09-19 11:59:01 +00:00
AsmParser	Make the size and expr arguments of .fill directive optional.	2013-09-24 17:44:41 +00:00
COFF	COFF: Ensure that objects produced by LLVM link with /safeseh	2013-09-17 23:18:05 +00:00
Disassembler	[ARMv8] Add support for the v8 cryptography extensions.	2013-09-19 11:59:01 +00:00
ELF	X86: Use R_X86_64_TPOFF64 for FK_Data_8	2013-09-22 05:30:16 +00:00
MachO	Fixed a crash in the integrated assembler for Mach-O when a symbol difference	2013-09-05 20:25:06 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	[mips][msa] Direct Object Emission for 3R instructions.	2013-09-26 00:09:46 +00:00
PowerPC	PPC: Allow partial fills in writeNopData()	2013-09-26 09:18:48 +00:00
SystemZ	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
X86	Add the remaining Intel SHA instructions	2013-09-14 15:03:21 +00:00