95 lines
2.8 KiB
C++
95 lines
2.8 KiB
C++
//===-- Mos6502TargetMachine.cpp - Define TargetMachine for Mos6502 -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "Mos6502TargetMachine.h"
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#include "Mos6502TargetObjectFile.h"
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#include "Mos6502.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/LegacyPassManager.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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extern "C" void LLVMInitializeMos6502Target() {
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// Register the target.
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RegisterTargetMachine<Mos6502TargetMachine> Z(TheMos6502Target);
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}
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static std::string computeDataLayout(const Triple &T) {
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std::string Ret = "e";
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Ret += "-m:e";
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Ret += "-p:32:32";
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// Alignments for 64 bit integers.
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Ret += "-i64:64";
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// On Mos6502V9 128 floats are aligned to 128 bits, on others only to 64.
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// On Mos6502V9 registers can hold 64 or 32 bits, on others only 32.
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Ret += "-f128:64-n32";
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Ret += "-S64";
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return Ret;
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}
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/// Mos6502TargetMachine ctor - Create an ILP32 architecture model
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///
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Mos6502TargetMachine::Mos6502TargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL)
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: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
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RM, CM, OL),
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TLOF(make_unique<Mos6502ELFTargetObjectFile>()),
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Subtarget(TT, CPU, FS, *this, false) {
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initAsmInfo();
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}
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Mos6502TargetMachine::~Mos6502TargetMachine() {}
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namespace {
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/// Mos6502 Code Generator Pass Configuration Options.
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class Mos6502PassConfig : public TargetPassConfig {
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public:
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Mos6502PassConfig(Mos6502TargetMachine *TM, PassManagerBase &PM)
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: TargetPassConfig(TM, PM) {}
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Mos6502TargetMachine &getMos6502TargetMachine() const {
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return getTM<Mos6502TargetMachine>();
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}
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void addIRPasses() override;
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bool addInstSelector() override;
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void addPreEmitPass() override;
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};
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} // namespace
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TargetPassConfig *Mos6502TargetMachine::createPassConfig(PassManagerBase &PM) {
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return new Mos6502PassConfig(this, PM);
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}
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void Mos6502PassConfig::addIRPasses() {
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addPass(createAtomicExpandPass(&getMos6502TargetMachine()));
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TargetPassConfig::addIRPasses();
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}
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bool Mos6502PassConfig::addInstSelector() {
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addPass(createMos6502ISelDag(getMos6502TargetMachine()));
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return false;
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}
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void Mos6502PassConfig::addPreEmitPass(){
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addPass(createMos6502DelaySlotFillerPass(getMos6502TargetMachine()));
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}
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