Colin LeMahieu 3a0f6b52db [Hexagon] Adding doubleword multiplies with and without accumulation. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224293 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-16 00:07:24 +00:00
..
AArch64	Update AArch64 ELF relocations to ABI 1.0	2014-11-26 10:49:18 +00:00
ARM	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
AsmParser
COFF	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Disassembler	[Hexagon] Adding doubleword multiplies with and without accumulation.	2014-12-16 00:07:24 +00:00
ELF	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Hexagon	[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.	2014-12-09 18:16:49 +00:00
MachO	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Markup
Mips	The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests.	2014-12-01 11:12:04 +00:00
PowerPC	[PowerPC] Add asm support for cache-inhibited ld/st instructions	2014-11-30 10:15:56 +00:00
R600	R600/SI: Start implementing an assembler	2014-11-14 14:08:00 +00:00
Sparc
SystemZ
X86	[X86] And also test INSERTPS shuffle mask pretty-printing.	2014-12-15 19:47:35 +00:00