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https://github.com/c64scene-ar/llvm-6502.git
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0ef47114d3
Differential Revision: http://reviews.llvm.org/D4293 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212726 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
908 B
LLVM
25 lines
908 B
LLVM
; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
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; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
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; RUN: llc -march=mips -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s
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; RUN: llc -march=mipsel -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s
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; RUN-TODO: llc -march=mips64 -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s
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; RUN-TODO: llc -march=mips64el -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s
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define void @fpu_clobber() nounwind {
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entry:
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call void asm "# Clobber", "~{$f21}"()
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ret void
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}
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; O32-FPXX-LABEL: fpu_clobber:
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; O32-FPXX: addiu $sp, $sp, -8
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; O32-FP64-INV-NOT: sdc1 $f20,
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; O32-FPXX-DAG: sdc1 [[F20:\$f20]], [[OFF20:[0-9]+]]($sp)
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; O32-FPXX-DAG: ldc1 [[F20]], [[OFF20]]($sp)
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; O32-FPXX: addiu $sp, $sp, 8
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