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https://github.com/c64scene-ar/llvm-6502.git
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929bdb2379
By default, the behavior of IT block generation will be determinated dynamically base on the arch (armv8 vs armv7). This patch adds backend options: -arm-restrict-it and -arm-no-restrict-it. The former one restricts the generation of IT blocks (the same behavior as thumbv8) for both arches. The later one allows the generation of legacy IT block (the same behavior as ARMv7 Thumb2) for both arches. Clang will support -mrestrict-it and -mno-restrict-it, which is compatible with GCC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194592 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
539 B
LLVM
18 lines
539 B
LLVM
; RUN: llc < %s -mtriple=thumbv8 -mattr=+neon | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7 -mattr=+neon -arm-restrict-it | FileCheck %s
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;CHECK-LABEL: select_s_v_v:
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;CHECK-NOT: it
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;CHECK: bx
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define <16 x i8> @select_s_v_v(i32 %avail, i8* %bar) {
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entry:
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%vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %bar, i32 1)
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%and = and i32 %avail, 1
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%tobool = icmp eq i32 %and, 0
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%vld1. = select i1 %tobool, <16 x i8> %vld1, <16 x i8> zeroinitializer
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ret <16 x i8> %vld1.
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}
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declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* , i32 )
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