Kevin Enderby 96f3b25e8a Update the X86 assembler for .intel_syntax to accept ... the | and & bitwise operators. rdar://15570412 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199323 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-15 19:05:24 +00:00
..
AlignedBundling
3DNow.s
2011-09-06-NoNewline.s
address-size.s	[x86] Add basic support for .code16	2014-01-06 04:55:54 +00:00
avx512-encodings.s
cfi_def_cfa-crash.s
fde-reloc.s
gnux32-dwarf-gen.s
intel-syntax-2.s
intel-syntax-bitwise-ops.s	Update the X86 assembler for .intel_syntax to accept	2014-01-15 19:05:24 +00:00
intel-syntax-directional-label.s	Un-revert: the buildbot failure in LLVM on lld-x86_64-win7 had me with	2013-12-19 23:16:14 +00:00
intel-syntax-encoding.s
intel-syntax-hex.s
intel-syntax.s
lit.local.cfg
padlock.s
relax-insn.s	[x86] Do not relax PUSHi16 to PUSHi32 (PR18414)	2014-01-08 12:58:32 +00:00
ret.s	[x86] Fix retq/retl handling in 64-bit mode	2014-01-13 14:05:59 +00:00
shuffle-comments.s
stackmap-nops.ll	Grow the stackmap/patchpoint format to hold 64-bit IDs.	2013-12-13 18:37:10 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	[x86] Make AsmParser validate registers for memory operands a bit better	2014-01-08 12:58:28 +00:00
x86_long_nop.s
x86_nop.s
x86_operands.s
x86-16.s	[x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand	2014-01-08 12:58:24 +00:00
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s	[x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases	2014-01-08 12:57:55 +00:00
x86-64.s	[x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases	2014-01-08 12:57:55 +00:00
x86-target-directives.s	correct target directive handling error handling	2014-01-13 01:15:39 +00:00