mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
bb804ee909
Currently, llvm always emits a DWARF CIE with a version of 1, even when emitting DWARF 3 or 4, which both support CIE version 3. This patch makes it emit the newer CIE version when we are emitting DWARF 3 or 4. This will not reduce compatibility, as we already emit other DWARF3/4 features, and is worth doing as the DWARF3 spec removed some ambiguities in the interpretation of call frame information. It also fixes a minor bug where the "return address" field of the CIE was encoded as a ULEB128, which is only valid when the CIE version is 3. There are no test changes for this, because (as far as I can tell) none of the platforms that we test have a return address register with a DWARF register number >127. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211272 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.4 KiB
ArmAsm
51 lines
1.4 KiB
ArmAsm
// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s
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f:
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.cfi_startproc
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nop
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.cfi_remember_state
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nop
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.cfi_restore_state
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nop
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.cfi_endproc
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// CHECK: Section {
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// CHECK: Index: 4
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// CHECK-NEXT: Name: .eh_frame
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// CHECK-NEXT: Type: SHT_PROGBITS
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: SHF_ALLOC
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// CHECK-NEXT: ]
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// CHECK-NEXT: Address: 0x0
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// CHECK-NEXT: Offset: 0x48
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// CHECK-NEXT: Size: 48
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// CHECK-NEXT: Link: 0
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// CHECK-NEXT: Info: 0
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// CHECK-NEXT: AddressAlignment: 8
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// CHECK-NEXT: EntrySize: 0
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// CHECK-NEXT: Relocations [
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// CHECK-NEXT: ]
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// CHECK-NEXT: SectionData (
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// CHECK-NEXT: 0000: 14000000 00000000 037A5200 01781001
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// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000
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// CHECK-NEXT: 0020: 00000000 03000000 00410A41 0B000000
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// CHECK-NEXT: )
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// CHECK-NEXT: }
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// CHECK: Section {
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// CHECK: Index: 5
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// CHECK-NEXT: Name: .rela.eh_frame
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// CHECK-NEXT: Type: SHT_RELA
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: ]
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// CHECK-NEXT: Address: 0x0
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// CHECK-NEXT: Offset: 0x390
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// CHECK-NEXT: Size: 24
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// CHECK-NEXT: Link: 7
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// CHECK-NEXT: Info: 4
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// CHECK-NEXT: AddressAlignment: 8
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// CHECK-NEXT: EntrySize: 24
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// CHECK-NEXT: Relocations [
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// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
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// CHECK-NEXT: ]
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// CHECK: }
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