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1f23239c5b
We use an unused Mips 32 register for the emergency slot instead of using the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.7 KiB
C++
52 lines
1.7 KiB
C++
//===-- Mips16RegisterInfo.h - Mips16 Register Information ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips16 implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPS16REGISTERINFO_H
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#define MIPS16REGISTERINFO_H
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#include "MipsRegisterInfo.h"
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namespace llvm {
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class Mips16InstrInfo;
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class Mips16RegisterInfo : public MipsRegisterInfo {
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const Mips16InstrInfo &TII;
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public:
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Mips16RegisterInfo(const MipsSubtarget &Subtarget, const Mips16InstrInfo &TII);
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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bool requiresRegisterScavenging(const MachineFunction &MF) const;
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bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
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bool useFPForScavengingIndex(const MachineFunction &MF) const;
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bool saveScavengerRegister(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator &UseMI,
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const TargetRegisterClass *RC,
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unsigned Reg) const;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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int64_t SPOffset) const;
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};
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} // end namespace llvm
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#endif
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