llvm-6502/test/CodeGen
Simon Pilgrim ec49b722fd [X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets
4i32 shuffles for single insertions into zero vectors lowers to X86vzmovl which was using (v)blendps - causing domain switch stalls. This patch fixes this by using (v)pblendw instead.

The updated tests on test/CodeGen/X86/sse41.ll still contain a domain stall due to the use of insertps - I'm looking at fixing this in a future patch.

Differential Revision: http://reviews.llvm.org/D6458



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223165 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-02 22:31:23 +00:00
..
AArch64 [AArch64][Stackmaps] Optimize stackmap shadows on AArch64. 2014-12-02 21:36:24 +00:00
ARM Emit Tag_ABI_FP_denormal correctly in fast-math mode. 2014-12-02 08:22:29 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Fix passing of small structures for big-endian O32. 2014-12-02 20:40:27 +00:00
MSP430
NVPTX [NVPTX] Do not emit .weak symbols for NVPTX 2014-12-01 21:16:17 +00:00
PowerPC [PowerPC] Implement readcyclecounter for PPC32 2014-12-02 22:01:00 +00:00
R600 R600/SI: Move more information into SIProgramInfo struct 2014-12-02 21:28:53 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 [X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets 2014-12-02 22:31:23 +00:00
XCore