llvm-6502/test/CodeGen/AArch64/large_shift.ll
Matthias Braun dd1a6e074d AArch64: Relax assert about large shift sizes.
The reason why these large shift sizes happen is because OpaqueConstants
currently inhibit alot of DAG combining, but that has to be addressed in
another commit (like the proposal in D6946).

Differential Revision: http://reviews.llvm.org/D6940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-24 18:52:04 +00:00

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LLVM

; RUN: llc -march=aarch64 -o - %s
target triple = "arm64-unknown-unknown"
; Make sure we don't run into an assert in the aarch64 code selection when
; DAGCombining fails.
declare void @t()
define void @foo() {
%c = bitcast i64 270458 to i64
%t0 = lshr i64 %c, 422383
%t1 = trunc i64 %t0 to i1
br i1 %t1, label %BB1, label %BB0
BB0:
call void @t()
br label %BB1
BB1:
ret void
}