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c23197a26f
This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
2.8 KiB
C++
92 lines
2.8 KiB
C++
//===- PIC16RegisterInfo.cpp - PIC16 Register Information -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PIC16 implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pic16-reg-info"
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#include "PIC16.h"
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#include "PIC16RegisterInfo.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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PIC16RegisterInfo::PIC16RegisterInfo(const TargetInstrInfo &tii,
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const PIC16Subtarget &st)
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: PIC16GenRegisterInfo(PIC16::ADJCALLSTACKDOWN, PIC16::ADJCALLSTACKUP),
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TII(tii),
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ST(st) {}
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#include "PIC16GenRegisterInfo.inc"
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/// PIC16 Callee Saved Registers
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const unsigned* PIC16RegisterInfo::
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getCalleeSavedRegs(const MachineFunction *MF) const {
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static const unsigned CalleeSavedRegs[] = { 0 };
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return CalleeSavedRegs;
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}
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// PIC16 Callee Saved Reg Classes
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const TargetRegisterClass* const*
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PIC16RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
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return CalleeSavedRegClasses;
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}
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BitVector PIC16RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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return Reserved;
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}
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bool PIC16RegisterInfo::hasFP(const MachineFunction &MF) const {
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return false;
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}
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void PIC16RegisterInfo::
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eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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RegScavenger *RS) const
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{ /* NOT YET IMPLEMENTED */ }
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void PIC16RegisterInfo::emitPrologue(MachineFunction &MF) const
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{ /* NOT YET IMPLEMENTED */ }
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void PIC16RegisterInfo::
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emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
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{ /* NOT YET IMPLEMENTED */ }
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int PIC16RegisterInfo::
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getDwarfRegNum(unsigned RegNum, bool isEH) const {
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llvm_unreachable("Not keeping track of debug information yet!!");
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return -1;
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}
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unsigned PIC16RegisterInfo::getFrameRegister(MachineFunction &MF) const {
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llvm_unreachable("PIC16 Does not have any frame register");
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return 0;
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}
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unsigned PIC16RegisterInfo::getRARegister() const {
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llvm_unreachable("PIC16 Does not have any return address register");
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return 0;
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}
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// This function eliminates ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP pseudo instructions
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void PIC16RegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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// Simply discard ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP instructions.
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MBB.erase(I);
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}
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