mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-11 23:25:15 +00:00
7312a22ed6
'or sequence' that it doesn't understand. This allows us to optimize
something insane like this:
int crud (unsigned char c, unsigned x)
{
if(((((((((( (int) c <= 32 ||
(int) c == 46) || (int) c == 44)
|| (int) c == 58) || (int) c == 59) || (int) c == 60)
|| (int) c == 62) || (int) c == 34) || (int) c == 92)
|| (int) c == 39) != 0)
foo();
}
into:
define i32 @crud(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
entry:
%cmp = icmp ult i8 %c, 33
br i1 %cmp, label %if.then, label %switch.early.test
switch.early.test: ; preds = %entry
switch i8 %c, label %if.end [
i8 39, label %if.then
i8 44, label %if.then
i8 58, label %if.then
i8 59, label %if.then
i8 60, label %if.then
i8 62, label %if.then
i8 46, label %if.then
i8 92, label %if.then
i8 34, label %if.then
]
by pulling the < comparison out ahead of the newly formed switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121680 91177308-0d34-0410-b5e6-96231b3b80d8
179 lines
5.9 KiB
LLVM
179 lines
5.9 KiB
LLVM
; RUN: opt < %s -simplifycfg -S | FileCheck %s
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declare void @foo1()
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declare void @foo2()
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define void @test1(i32 %V) {
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%C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
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%C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
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%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
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br i1 %CN, label %T, label %F
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T: ; preds = %0
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call void @foo1( )
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ret void
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F: ; preds = %0
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call void @foo2( )
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ret void
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; CHECK: @test1
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; CHECK: switch i32 %V, label %F [
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; CHECK: i32 17, label %T
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; CHECK: i32 4, label %T
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; CHECK: ]
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}
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define void @test2(i32 %V) {
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%C1 = icmp ne i32 %V, 4 ; <i1> [#uses=1]
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%C2 = icmp ne i32 %V, 17 ; <i1> [#uses=1]
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%CN = and i1 %C1, %C2 ; <i1> [#uses=1]
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br i1 %CN, label %T, label %F
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T: ; preds = %0
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call void @foo1( )
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ret void
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F: ; preds = %0
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call void @foo2( )
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ret void
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; CHECK: @test2
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; CHECK: switch i32 %V, label %T [
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; CHECK: i32 17, label %F
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; CHECK: i32 4, label %F
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; CHECK: ]
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}
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define void @test3(i32 %V) {
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%C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
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br i1 %C1, label %T, label %N
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N: ; preds = %0
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%C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
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br i1 %C2, label %T, label %F
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T: ; preds = %N, %0
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call void @foo1( )
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ret void
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F: ; preds = %N
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call void @foo2( )
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ret void
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; CHECK: @test3
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; CHECK: switch i32 %V, label %F [
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; CHECK: i32 4, label %T
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; CHECK: i32 17, label %T
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; CHECK: ]
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}
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define i32 @test4(i8 zeroext %c) nounwind ssp noredzone {
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entry:
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%cmp = icmp eq i8 %c, 62
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br i1 %cmp, label %lor.end, label %lor.lhs.false
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lor.lhs.false: ; preds = %entry
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%cmp4 = icmp eq i8 %c, 34
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br i1 %cmp4, label %lor.end, label %lor.rhs
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lor.rhs: ; preds = %lor.lhs.false
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%cmp8 = icmp eq i8 %c, 92
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br label %lor.end
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lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
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%0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ]
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%lor.ext = zext i1 %0 to i32
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ret i32 %lor.ext
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; CHECK: @test4
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; CHECK: switch i8 %c, label %lor.rhs [
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; CHECK: i8 62, label %lor.end
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; CHECK: i8 34, label %lor.end
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; CHECK: i8 92, label %lor.end
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; CHECK: ]
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}
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define i32 @test5(i8 zeroext %c) nounwind ssp noredzone {
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entry:
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switch i8 %c, label %lor.rhs [
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i8 62, label %lor.end
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i8 34, label %lor.end
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i8 92, label %lor.end
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]
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lor.rhs: ; preds = %entry
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%V = icmp eq i8 %c, 92
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br label %lor.end
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lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
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%0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ]
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%lor.ext = zext i1 %0 to i32
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ret i32 %lor.ext
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; CHECK: @test5
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; CHECK: switch i8 %c, label %lor.rhs [
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; CHECK: i8 62, label %lor.end
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; CHECK: i8 34, label %lor.end
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; CHECK: i8 92, label %lor.end
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; CHECK: ]
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}
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define i1 @test6({ i32, i32 }* %I) {
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entry:
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%tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
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%tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6]
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%tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
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br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
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shortcirc_next.0: ; preds = %entry
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%tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1]
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br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1
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shortcirc_next.1: ; preds = %shortcirc_next.0
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%tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1]
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br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2
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shortcirc_next.2: ; preds = %shortcirc_next.1
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%tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1]
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br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3
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shortcirc_next.3: ; preds = %shortcirc_next.2
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%tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1]
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br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4
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shortcirc_next.4: ; preds = %shortcirc_next.3
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%tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1]
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br label %UnifiedReturnBlock
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shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry
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br label %UnifiedReturnBlock
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UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4
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%UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1]
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ret i1 %UnifiedRetVal
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; CHECK: @test6
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; CHECK: switch i32 %tmp.2.i, label %shortcirc_next.4 [
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; CHECK: i32 14, label %UnifiedReturnBlock
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; CHECK: i32 15, label %UnifiedReturnBlock
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; CHECK: i32 16, label %UnifiedReturnBlock
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; CHECK: i32 17, label %UnifiedReturnBlock
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; CHECK: i32 18, label %UnifiedReturnBlock
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; CHECK: i32 19, label %switch.edge
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; CHECK: ]
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}
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define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
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entry:
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%cmp = icmp ult i32 %x, 32
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%cmp4 = icmp eq i8 %c, 97
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%or.cond = or i1 %cmp, %cmp4
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%cmp9 = icmp eq i8 %c, 99
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%or.cond11 = or i1 %or.cond, %cmp9
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br i1 %or.cond11, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo1() nounwind noredzone
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ret void
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if.end: ; preds = %entry
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ret void
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; CHECK: @test7
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; CHECK: %cmp = icmp ult i32 %x, 32
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; CHECK: br i1 %cmp, label %if.then, label %switch.early.test
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; CHECK: switch.early.test:
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; CHECK: switch i8 %c, label %if.end [
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; CHECK: i8 99, label %if.then
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; CHECK: i8 97, label %if.then
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; CHECK: ]
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}
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