mirror of
https://github.com/c64scene-ar/llvm-6502.git
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0b8c9a80f2
into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
450 lines
16 KiB
C++
450 lines
16 KiB
C++
//===-- MBlazeFrameLowering.cpp - MBlaze Frame Information ---------------====//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the MBlaze implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mblaze-frame-lowering"
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#include "MBlazeFrameLowering.h"
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#include "InstPrinter/MBlazeInstPrinter.h"
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#include "MBlazeInstrInfo.h"
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#include "MBlazeMachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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static cl::opt<bool> MBDisableStackAdjust(
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"disable-mblaze-stack-adjust",
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cl::init(false),
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cl::desc("Disable MBlaze stack layout adjustment."),
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cl::Hidden);
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static void replaceFrameIndexes(MachineFunction &MF,
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SmallVector<std::pair<int,int64_t>, 16> &FR) {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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const SmallVector<std::pair<int,int64_t>, 16>::iterator FRB = FR.begin();
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const SmallVector<std::pair<int,int64_t>, 16>::iterator FRE = FR.end();
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SmallVector<std::pair<int,int64_t>, 16>::iterator FRI = FRB;
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for (; FRI != FRE; ++FRI) {
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MFI->RemoveStackObject(FRI->first);
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int NFI = MFI->CreateFixedObject(4, FRI->second, true);
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MBlazeFI->recordReplacement(FRI->first, NFI);
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for (MachineFunction::iterator MB=MF.begin(), ME=MF.end(); MB!=ME; ++MB) {
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MachineBasicBlock::iterator MBB = MB->begin();
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const MachineBasicBlock::iterator MBE = MB->end();
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for (; MBB != MBE; ++MBB) {
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MachineInstr::mop_iterator MIB = MBB->operands_begin();
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const MachineInstr::mop_iterator MIE = MBB->operands_end();
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for (MachineInstr::mop_iterator MII = MIB; MII != MIE; ++MII) {
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if (!MII->isFI() || MII->getIndex() != FRI->first) continue;
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DEBUG(dbgs() << "FOUND FI#" << MII->getIndex() << "\n");
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MII->setIndex(NFI);
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}
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}
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}
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}
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}
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//===----------------------------------------------------------------------===//
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//
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// Stack Frame Processing methods
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// +----------------------------+
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//
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// The stack is allocated decrementing the stack pointer on
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// the first instruction of a function prologue. Once decremented,
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// all stack references are are done through a positive offset
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// from the stack/frame pointer, so the stack is considered
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// to grow up.
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//
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//===----------------------------------------------------------------------===//
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static void analyzeFrameIndexes(MachineFunction &MF) {
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if (MBDisableStackAdjust) return;
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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MachineRegisterInfo::livein_iterator LII = MRI.livein_begin();
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MachineRegisterInfo::livein_iterator LIE = MRI.livein_end();
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const SmallVector<int, 16> &LiveInFI = MBlazeFI->getLiveIn();
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SmallVector<MachineInstr*, 16> EraseInstr;
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SmallVector<std::pair<int,int64_t>, 16> FrameRelocate;
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MachineBasicBlock *MBB = MF.getBlockNumbered(0);
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MachineBasicBlock::iterator MIB = MBB->begin();
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MachineBasicBlock::iterator MIE = MBB->end();
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int StackAdjust = 0;
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int StackOffset = -28;
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// In this loop we are searching frame indexes that corrospond to incoming
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// arguments that are already in the stack. We look for instruction sequences
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// like the following:
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//
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// LWI REG, FI1, 0
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// ...
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// SWI REG, FI2, 0
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//
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// As long as there are no defs of REG in the ... part, we can eliminate
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// the SWI instruction because the value has already been stored to the
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// stack by the caller. All we need to do is locate FI at the correct
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// stack location according to the calling convensions.
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//
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// Additionally, if the SWI operation kills the def of REG then we don't
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// need the LWI operation so we can erase it as well.
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for (unsigned i = 0, e = LiveInFI.size(); i < e; ++i) {
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for (MachineBasicBlock::iterator I=MIB; I != MIE; ++I) {
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if (I->getOpcode() != MBlaze::LWI || I->getNumOperands() != 3 ||
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!I->getOperand(1).isFI() || !I->getOperand(0).isReg() ||
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I->getOperand(1).getIndex() != LiveInFI[i]) continue;
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unsigned FIReg = I->getOperand(0).getReg();
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MachineBasicBlock::iterator SI = I;
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for (SI++; SI != MIE; ++SI) {
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if (!SI->getOperand(0).isReg() ||
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!SI->getOperand(1).isFI() ||
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SI->getOpcode() != MBlaze::SWI) continue;
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int FI = SI->getOperand(1).getIndex();
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if (SI->getOperand(0).getReg() != FIReg ||
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MFI->isFixedObjectIndex(FI) ||
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MFI->getObjectSize(FI) != 4) continue;
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if (SI->getOperand(0).isDef()) break;
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if (SI->getOperand(0).isKill()) {
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DEBUG(dbgs() << "LWI for FI#" << I->getOperand(1).getIndex()
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<< " removed\n");
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EraseInstr.push_back(I);
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}
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EraseInstr.push_back(SI);
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DEBUG(dbgs() << "SWI for FI#" << FI << " removed\n");
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FrameRelocate.push_back(std::make_pair(FI,StackOffset));
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DEBUG(dbgs() << "FI#" << FI << " relocated to " << StackOffset << "\n");
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StackOffset -= 4;
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StackAdjust += 4;
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break;
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}
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}
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}
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// In this loop we are searching for frame indexes that corrospond to
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// incoming arguments that are in registers. We look for instruction
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// sequences like the following:
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//
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// ... SWI REG, FI, 0
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//
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// As long as the ... part does not define REG and if REG is an incoming
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// parameter register then we know that, according to ABI convensions, the
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// caller has allocated stack space for it already. Instead of allocating
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// stack space on our frame, we record the correct location in the callers
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// frame.
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for (MachineRegisterInfo::livein_iterator LI = LII; LI != LIE; ++LI) {
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for (MachineBasicBlock::iterator I=MIB; I != MIE; ++I) {
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if (I->definesRegister(LI->first))
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break;
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if (I->getOpcode() != MBlaze::SWI || I->getNumOperands() != 3 ||
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!I->getOperand(1).isFI() || !I->getOperand(0).isReg() ||
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I->getOperand(1).getIndex() < 0) continue;
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if (I->getOperand(0).getReg() == LI->first) {
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int FI = I->getOperand(1).getIndex();
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MBlazeFI->recordLiveIn(FI);
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int FILoc = 0;
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switch (LI->first) {
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default: llvm_unreachable("invalid incoming parameter!");
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case MBlaze::R5: FILoc = -4; break;
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case MBlaze::R6: FILoc = -8; break;
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case MBlaze::R7: FILoc = -12; break;
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case MBlaze::R8: FILoc = -16; break;
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case MBlaze::R9: FILoc = -20; break;
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case MBlaze::R10: FILoc = -24; break;
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}
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StackAdjust += 4;
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FrameRelocate.push_back(std::make_pair(FI,FILoc));
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DEBUG(dbgs() << "FI#" << FI << " relocated to " << FILoc << "\n");
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break;
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}
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}
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}
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// Go ahead and erase all of the instructions that we determined were
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// no longer needed.
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for (int i = 0, e = EraseInstr.size(); i < e; ++i)
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MBB->erase(EraseInstr[i]);
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// Replace all of the frame indexes that we have relocated with new
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// fixed object frame indexes.
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replaceFrameIndexes(MF, FrameRelocate);
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}
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static void interruptFrameLayout(MachineFunction &MF) {
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const Function *F = MF.getFunction();
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CallingConv::ID CallConv = F->getCallingConv();
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// If this function is not using either the interrupt_handler
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// calling convention or the save_volatiles calling convention
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// then we don't need to do any additional frame layout.
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if (CallConv != CallingConv::MBLAZE_INTR &&
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CallConv != CallingConv::MBLAZE_SVOL)
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return;
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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const MBlazeInstrInfo &TII =
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*static_cast<const MBlazeInstrInfo*>(MF.getTarget().getInstrInfo());
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// Determine if the calling convention is the interrupt_handler
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// calling convention. Some pieces of the prologue and epilogue
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// only need to be emitted if we are lowering and interrupt handler.
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bool isIntr = CallConv == CallingConv::MBLAZE_INTR;
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// Determine where to put prologue and epilogue additions
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MachineBasicBlock &MENT = MF.front();
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MachineBasicBlock &MEXT = MF.back();
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MachineBasicBlock::iterator MENTI = MENT.begin();
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MachineBasicBlock::iterator MEXTI = prior(MEXT.end());
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DebugLoc ENTDL = MENTI != MENT.end() ? MENTI->getDebugLoc() : DebugLoc();
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DebugLoc EXTDL = MEXTI != MEXT.end() ? MEXTI->getDebugLoc() : DebugLoc();
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// Store the frame indexes generated during prologue additions for use
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// when we are generating the epilogue additions.
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SmallVector<int, 10> VFI;
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// Build the prologue SWI for R3 - R12 if needed. Note that R11 must
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// always have a SWI because it is used when processing RMSR.
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for (unsigned r = MBlaze::R3; r <= MBlaze::R12; ++r) {
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if (!MRI.isPhysRegUsed(r) && !(isIntr && r == MBlaze::R11)) continue;
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int FI = MFI->CreateStackObject(4,4,false,false);
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VFI.push_back(FI);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), r)
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.addFrameIndex(FI).addImm(0);
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}
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// Build the prologue SWI for R17, R18
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int R17FI = MFI->CreateStackObject(4,4,false,false);
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int R18FI = MFI->CreateStackObject(4,4,false,false);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R17)
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.addFrameIndex(R17FI).addImm(0);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R18)
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.addFrameIndex(R18FI).addImm(0);
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// Buid the prologue SWI and the epilogue LWI for RMSR if needed
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if (isIntr) {
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int MSRFI = MFI->CreateStackObject(4,4,false,false);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::MFS), MBlaze::R11)
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.addReg(MBlaze::RMSR);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R11)
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.addFrameIndex(MSRFI).addImm(0);
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R11)
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.addFrameIndex(MSRFI).addImm(0);
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::MTS), MBlaze::RMSR)
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.addReg(MBlaze::R11);
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}
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// Build the epilogue LWI for R17, R18
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R18)
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.addFrameIndex(R18FI).addImm(0);
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R17)
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.addFrameIndex(R17FI).addImm(0);
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// Build the epilogue LWI for R3 - R12 if needed
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for (unsigned r = MBlaze::R12, i = VFI.size(); r >= MBlaze::R3; --r) {
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if (!MRI.isPhysRegUsed(r)) continue;
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), r)
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.addFrameIndex(VFI[--i]).addImm(0);
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}
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}
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static void determineFrameLayout(MachineFunction &MF) {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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// Replace the dummy '0' SPOffset by the negative offsets, as explained on
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// LowerFORMAL_ARGUMENTS. Leaving '0' for while is necessary to avoid
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// the approach done by calculateFrameObjectOffsets to the stack frame.
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MBlazeFI->adjustLoadArgsFI(MFI);
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MBlazeFI->adjustStoreVarArgsFI(MFI);
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// Get the number of bytes to allocate from the FrameInfo
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unsigned FrameSize = MFI->getStackSize();
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DEBUG(dbgs() << "Original Frame Size: " << FrameSize << "\n" );
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// Get the alignments provided by the target, and the maximum alignment
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// (if any) of the fixed frame objects.
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// unsigned MaxAlign = MFI->getMaxAlignment();
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unsigned TargetAlign = MF.getTarget().getFrameLowering()->getStackAlignment();
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unsigned AlignMask = TargetAlign - 1;
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// Make sure the frame is aligned.
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FrameSize = (FrameSize + AlignMask) & ~AlignMask;
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MFI->setStackSize(FrameSize);
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DEBUG(dbgs() << "Aligned Frame Size: " << FrameSize << "\n" );
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}
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int MBlazeFrameLowering::getFrameIndexOffset(const MachineFunction &MF, int FI)
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const {
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const MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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if (MBlazeFI->hasReplacement(FI))
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FI = MBlazeFI->getReplacement(FI);
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return TargetFrameLowering::getFrameIndexOffset(MF,FI);
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}
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// hasFP - Return true if the specified function should have a dedicated frame
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// pointer register. This is true if the function has variable sized allocas or
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// if frame pointer elimination is disabled.
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bool MBlazeFrameLowering::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return MF.getTarget().Options.DisableFramePointerElim(MF) ||
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MFI->hasVarSizedObjects();
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}
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void MBlazeFrameLowering::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const MBlazeInstrInfo &TII =
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*static_cast<const MBlazeInstrInfo*>(MF.getTarget().getInstrInfo());
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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CallingConv::ID CallConv = MF.getFunction()->getCallingConv();
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bool requiresRA = CallConv == CallingConv::MBLAZE_INTR;
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// Determine the correct frame layout
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determineFrameLayout(MF);
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// Get the number of bytes to allocate from the FrameInfo.
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unsigned StackSize = MFI->getStackSize();
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// No need to allocate space on the stack.
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if (StackSize == 0 && !MFI->adjustsStack() && !requiresRA) return;
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int FPOffset = MBlazeFI->getFPStackOffset();
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int RAOffset = MBlazeFI->getRAStackOffset();
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// Adjust stack : addi R1, R1, -imm
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BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDIK), MBlaze::R1)
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.addReg(MBlaze::R1).addImm(-StackSize);
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// swi R15, R1, stack_loc
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if (MFI->adjustsStack() || requiresRA) {
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BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
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.addReg(MBlaze::R15).addReg(MBlaze::R1).addImm(RAOffset);
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}
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if (hasFP(MF)) {
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// swi R19, R1, stack_loc
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BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
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.addReg(MBlaze::R19).addReg(MBlaze::R1).addImm(FPOffset);
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// add R19, R1, R0
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BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADD), MBlaze::R19)
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.addReg(MBlaze::R1).addReg(MBlaze::R0);
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}
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}
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void MBlazeFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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const MBlazeInstrInfo &TII =
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*static_cast<const MBlazeInstrInfo*>(MF.getTarget().getInstrInfo());
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DebugLoc dl = MBBI->getDebugLoc();
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CallingConv::ID CallConv = MF.getFunction()->getCallingConv();
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bool requiresRA = CallConv == CallingConv::MBLAZE_INTR;
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// Get the FI's where RA and FP are saved.
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int FPOffset = MBlazeFI->getFPStackOffset();
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int RAOffset = MBlazeFI->getRAStackOffset();
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if (hasFP(MF)) {
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// add R1, R19, R0
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BuildMI(MBB, MBBI, dl, TII.get(MBlaze::ADD), MBlaze::R1)
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.addReg(MBlaze::R19).addReg(MBlaze::R0);
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// lwi R19, R1, stack_loc
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BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R19)
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.addReg(MBlaze::R1).addImm(FPOffset);
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}
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// lwi R15, R1, stack_loc
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if (MFI->adjustsStack() || requiresRA) {
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BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15)
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.addReg(MBlaze::R1).addImm(RAOffset);
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}
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// Get the number of bytes from FrameInfo
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int StackSize = (int) MFI->getStackSize();
|
|
|
|
// addi R1, R1, imm
|
|
if (StackSize) {
|
|
BuildMI(MBB, MBBI, dl, TII.get(MBlaze::ADDIK), MBlaze::R1)
|
|
.addReg(MBlaze::R1).addImm(StackSize);
|
|
}
|
|
}
|
|
|
|
void MBlazeFrameLowering::
|
|
processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
|
|
RegScavenger *RS) const {
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
|
|
CallingConv::ID CallConv = MF.getFunction()->getCallingConv();
|
|
bool requiresRA = CallConv == CallingConv::MBLAZE_INTR;
|
|
|
|
if (MFI->adjustsStack() || requiresRA) {
|
|
MBlazeFI->setRAStackOffset(0);
|
|
MFI->CreateFixedObject(4,0,true);
|
|
}
|
|
|
|
if (hasFP(MF)) {
|
|
MBlazeFI->setFPStackOffset(4);
|
|
MFI->CreateFixedObject(4,4,true);
|
|
}
|
|
|
|
interruptFrameLayout(MF);
|
|
analyzeFrameIndexes(MF);
|
|
}
|